• Title/Summary/Keyword: LDO Regulator

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LDO regulator with improved regulation characteristics using gate current sensing structure (게이트 전류 감지 구조를 이용한 향상된 레귤레이션 특성의 LDO regulator)

  • Jun-Mo Jung
    • Journal of IKEEE
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    • v.27 no.3
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    • pp.308-312
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    • 2023
  • The gate current sensing structure was proposed to more effectively control the regulation of the output voltage when the LDO regulator occurs in an overshoot or undershoot situation. In a typical existing LDO regulator, the regulation voltage changes when the load current changes. However, the operation speed of the pass transistor can be further improved by supplying/discharging the gate terminal current in the pass transistor using a gate current sensing structure. The input voltage of the LDO regulator using the gate current sensing structure is 3.3 V to 4.5 V, the output voltage is 3 V, and the load current has a maximum value of 250 mA. As a result of the simulation, a voltage change value of about 12 mV was confirmed when the load current changed up to 250 mA.

Low Drop Out Regulator with Ripple Cancelation Circuit (잡음 제거 회로를 이용한 LDO 레귤레이터)

  • Kim, Chae-Won;Kwon, Min-Ju;Jung, Jun-Mo
    • Journal of IKEEE
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    • v.21 no.3
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    • pp.264-267
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    • 2017
  • In this paper, A low dropout (LDO) regulator that improves the power supply rejection ratio by using a noise canceling circuit is proposed. The noise rejection circuit between the error amplifier and the pass transistor is designed to reduce the influence of the pass transistor on the noise coming from the voltage source. The LDO regulator has the same regulation characteristics as the conventional LDO regulator. The proposed circuit uses 0.18um process and Cadence's Virtuoso and Specter simulator.

A Low Drop Out Regulator with Improved Load Transient Characteristics and Push-Pull Pass Transistor Structure (Push-Pull 패스 트랜지스터 구조 및 향상된 Load Transient 특성을 갖는 LDO 레귤레이터)

  • Kwon, Sang-Wook;Song, Bo Bae;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.598-603
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    • 2020
  • In this paper present a Low Drop-Out(LDO) regulator that improves load transient characteristics due to the push-pull pass transistor structure is proposed. Improved load over the existing LDO regulator by improving the overshoot and undershoot entering the voltage line by adding the proposed push-pull circuit between the output stage of the error amplifier inside the LDO regulator and the gate stage of the pass transistor and the push-pull circuit at the output stage. It has a delta voltage value of transient characteristics. The proposed LDO structure was analyzed in Samsung 0.13um process using Cadence's Virtuoso, Spectre simulator.

Small area LDO Regulator with pass transistor using body-driven technique (패스 트랜지스터에 바디 구동 기술을 적용한 저면적 LDO 레귤레이터)

  • Park, Jun-Soo;Yoo, Dae-Yeol;Song, Bo-Bae;Jung, Jun-Mo;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.17 no.2
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    • pp.214-220
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    • 2013
  • Small area LDO (Low drop-out) regulator with pass transistor using body-driven technique is presented in this paper. The body-driven technique can decrease threshold voltage (Vth) and increase the current ID flowing from drain to source in current. The technique is applied to the pass transistor to reduce size of area and maintain the same performance as conventional LDO regulator. A pass transistor using the technique can reduce its size by 5.5 %. The proposed LDO regulator works under the input voltage of 2.7 V ~ 4.5 V and provides up to 150mA load current for an output voltage range of 1.2 V ~ 3.3 V.

LDO Regulator with Improved Load Regulation Characteristics and Current Detection Structure (Current Detection 구조 및 향상된 Load Regulation 특성을 가진 LDO 레귤레이터)

  • Kwon, Sang-Wook;Kong, June Ho;Koo, Yong Seo
    • Journal of IKEEE
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    • v.25 no.3
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    • pp.506-510
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    • 2021
  • In this paper, we propose an LDO that improves the load regulation change due to the current detection structure. The proposed LDO regulator adds the proposed current detection circuit to the output stage. Thereby to improve the load regulation of the delta value coming in on the output has a voltage value of an improved load Regulation characteristics than conventional LDO regulator. Using the proposed current detection structure, it was possible to improve the output change according to the change of the load current by about 60%. The proposed circuit has been simulated and verified characteristics by using a Spectre, Virtuoso simulation of Cadence.

Design of a LDO regulator with a protection Function using a 0.35 µ BCD process (0.35 ㎛ BCD 공정을 이용한 보호회로 기능이 추가된 모바일용 LDO 레귤레이터)

  • Lee, Min-Ji;Son, Hyun-Sik;Park, Young-Soo;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.1
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    • pp.627-633
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    • 2015
  • We designed of a LDO regulator with a OVP and UVLO protection function for a PMIC. Proposed LDO regulator circuit consists of a BGR reference circuit, an error amplifier and a power transistor and so on. The proposed LDO regulator is designed for low voltage input power protection. Proposed LDO circuit generated fixed 2.5 V from a supply of 3.3V. It was designed with 3.3 V power supply using a $0.35{\mu}m$ CMOS technology. SPICE simulation results showed that the proposed circuit provides 0.713 mV/V line regulation with output 2.5 V ~ 3.9 V and $8.35{\mu}V/mA$ load regulation with load current 0 mA to 40 mA.

A Active Replica LDO Regulator with DC Matching Circuit (DC정합회로를 갖는 능동 Replica LDO 레귤레이터)

  • Ryu, In-Ho;Bang, Jun-Ho;Yu, Jae-Young
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.6
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    • pp.2729-2734
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    • 2011
  • In this paper, an active replica Low-dropout(LDO) regulator with DC voltage matching circuit is presented. In order to match the voltage between replica and output of regulator, DC voltage matching circuit is designed. The active replica low dropout regulator has higher Power Supply Rejection(PSR) than that of conventional regulator. The designed DC voltage matching circuit can reduce the drawback that may be occurred in replica regulator. And using fully active element in regulator can reduce the chip area and heat noise with resistor. As results of HSPICE simulation with 0.35um CMOS parameter, the designed active replica LDO regulator achieves Power Supply Rejection, -28@10Hz better than -17@10Hz of conventional replica regulator without DC matching circuit. And the output voltage is 3V.

LDO Regulator with Improved Transient Response Characteristics and Feedback Voltage Detection Structure (Feedback Voltage Detection 구조 및 향상된 과도응답 특성을 갖는 LDO regulator)

  • Jung, Jun-Mo
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.313-318
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    • 2022
  • The feedback voltage detection structure is proposed to alleviate overshoot and undershoot caused by the removal of the existing external output capacitor. Conventional LDO regulators suffer from overshoot and undershoot caused by imbalances in the power supply voltage. Therefore, the proposed LDO is designed to have a more improved transient response to form a new control path while maintaining only the feedback path of the conventional LDO regulator. A new control path detects overshoot and undershoot events in the output stage. Accordingly, the operation speed of the pass element is improved by charging and discharging the current of the gate node of the pass element. LDO regulators with feedback voltage sensing architecture operate over an input voltage range of 3.3V to 4.5V and have a load current of up to 200mA at an output voltage of 3V. According to the simulation result, when the load current is 200mA, it is 73mV under the undershoot condition and 61mV under the overshoot condition.

LDO Regulator with Improved Regulation Characteristics and Feedback Voltage Buffer Structure (Feedback Buffer 구조 및 향상된 Regulation 특성을 갖는 LDO regulator)

  • Jung, Jun-Mo;Park, Tae-Ryong
    • Journal of IKEEE
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    • v.26 no.3
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    • pp.462-467
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    • 2022
  • The feedback buffer structure is proposed to alleviate the overshoot and undershoot phenomenon and the regulation of the output voltage. The conventional LDO regulator undergoes a regulation voltage change caused by a constant load current change. An LDO regulator with a feedback voltage sensing structure operates in the input voltage range of 3.3 to 4.5 V and has a load current of up to 150 mA at output voltage of 3 V. According to the simulation results, a regulation value of 6.2 mV was ensured when the load current uniformly changed to 150 mA.

A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit

  • Cho, Han-Hee;Koo, Yong-Seo
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1673-1681
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    • 2015
  • A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.