• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.302-305
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• 1995

ITO(indium tin oxide) that is both conductive in electricity and transparent to the visible ray is called transparent conducting thin film. Nowaday, according to the development of flat panel display such as LCD(Liquid Crystal display, EL(electolumine- scence display), PDP(plasma display panel), ECD(electrocromic display), the higher quality in the low temperature process has been asked to reduce the production cost and to have a good uniformity on a large substrate. In this study, we prepared indium tin oxide(ITO) by a cylindrical DC magnetron sputtering with Indium-tin (9:1) alloy target instead of indium-tin oxide target. To reduce the defact in ITO, the effect on ITO by varing the magnetic field intensity and the applied voltage ares studied. the resistivity of the film deposited in oxygen partial pressure of 5% and substrate temperature of 140$^{\circ}C$. is 1.6${\times}$10$\^$-1/$\Omega$$.$cm with 85% optical transmission in viaible ray.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1625-1628
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• 2006

Two different negative-type photosensitive polyimides were synthesized and characterized for an application as an interdielectric layer in TFTLCD array. In the case of photocurable polyimides, the photosensitive moiety, 2-HHSP, was synthesized through 3 step reaction, and then was incorporated into side chains of polyimide precursor by post reaction. Optimum compositions of negative-type photocurable polyimde were also formulated. For photopolymerizable polyimides, two novel UV monomers containing imide linkages were prepared. An aqueous alkaline developable polymer matrix was synthesized by free radical copolymerization. A negative photoresist formulation was developed utilizing synthesized UV monomers containing imide linkage, photoinitiator, UV oligomer, and alkali developable polymer matrix. It was found that viaholes with good resolution, high transmittance and thermal resistance could be obtained by photolithographic process utilizing the negative-type photoresist formulations.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.630-633
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• 2003

Integrating the driver circuitry directly onto the glass substrate would be one of the advantages of polycrystalline Si (poly-Si) TFT-(LCD). Low-temperature poly-Si TFT(LTPS) is well-suited for higher-definition display applications due to its intrinsically superior electrical characteristics. In order to improve LTPS electrical characteristics, currently the excimer laser-induced crystallization (ELC) processes and sequential lateral solidification method were developed. Grain size of the poly-Si is mainly affected by beam pitch and energy density. Key parameter for making a larger poly-Si using excimer laser annealing(ELA) and increasing a throughput is due to increase in beam pitch and energy density to a certain degree. Furthermore, thin $SiO_{2}$ capping is effective to suppress the protrusion of the poly-Si thin films and to reduce the interface state density. From the ELA process, we are able to control grain size by varying different parameters such as number of shots and energy density.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.30 no.8 s.251
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• pp.957-964
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• 2006

As the requirement of LCD products which are large screen and have high brightness increases, the role of light guide panel (LGP) of which micro-features diffuse the light uniformly on surface is getting important. In general, there are many errors in machining like machine tool errors process error, setup error and etc. The amount of setup error in general machining is not so big in comparison with the others, so it is mostly neglected. But, especially in v-groove micromachining, setup error has a significant effect on micro-features. Low quality product and high cost are resulted from setup error. In v-groove micromachining, to confirm the effect of setup error, it is identified and then setup error synthesis model is derived from analysis of tool and workpiece setup. In addition, to predict the micro-features affected by setup error and enhance the production efficiency, the setup condition satisfying the tolerance of micro-features is geometrically analyzed and presented.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.3
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• pp.72-78
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• 1990

In this paper, the physical meanings of LDD optimization are treated by numerical simulation and related experiments are attempted to analyzed the optimized LDD structure. Firstly, according to the numerical analysis, the electric field under the n-region near drain is low and uniformly distributed and the current flow is widely distributed in this region under the optimized conditions. It is also found that this optimized point should be achieved by globally optimizing all the process and electrical conditions. Secondly, the maximum electric field, which is obtained from the substrate current to the drain current ratio, is minimized under the optimized condition according to the experiment. Further, the device lifetime is maximized and the n-resistance is changed smoothly from the channel resistance to the $n^+$junction resistance.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.10 no.1
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• pp.47-60
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• 2006

Due to the uneven illumination of FPD panel surface, it is difficult to detect the defects. The paper proposes a method to find the uneven illumination compensation using wavelets, which are done based on multi-resolution structure. The first step is to decompose the image into multi-resolution levels. Second, elimination of lowest smooth sub-image with highest frequency band removes the high frequency noise and low varying illumination. In particular, the main algorithm was implemented by lifting scheme for realtime inline process.

• Journal of Information Display
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• v.13 no.3
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• pp.113-118
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• 2012

Metal oxide semiconductors were considered promising materials as backplanes of future displays. Moreover, the adoption of carrier-suppressing metal into indium-zinc oxide (IZO) has become one of the most important themes in the metal oxide research field. In this paper, efforts to realize and optimize IZO with diverse types of carrier suppressors are summarized. Properties such as the band gap of metal in the oxidized form and its electronegativity were examined to confirm their relationship with the metal's carrier-suppressing ability. It was concluded that those two properties could be used as indicators of the carrier-suppressing ability of a material. As predicted by the properties, the alkali earth metals and early transition metals used in the research effectively suppressed the carrier and optimized the electrical properties of the metal oxide semiconductors. With the carrier-suppressing metals, IZO-based thin-film transistors with high (above $1cm^2/V{\cdot}s$) mobility, a lower than 0.6V/dec sub-threshold gate swing, and an over $3{\times}10^6$ on-to-off current ratio could be achieved.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.9
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• pp.494-503
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• 2003

In this paper, we propose the implementation techniques of IC card chipset that is compatible with international standard ISO-7816 and supports WindowsCE operating system to expropriate various electronic cash and credit card. This IC card interface chip set is composed with 32 bit ARM720T Core and AES(Advanced Encryption System) cryptography module for electronic commerce. Six IC card interfaces support T=0, T=1 protocol and two of them are used to interface with user card directly, the others are used for interface with SAM card. In addition, It supports a LCD controller and USB interface for host. We improved the performance about 70% than software based It card chip set and verified using Hynix 0.35um process.

• The KSFM Journal of Fluid Machinery
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• v.17 no.4
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• pp.76-80
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• 2014

PFA fluoropolymer lined technology revolutionized ball valve development and design decades ago and continues to be pivotal for many products and valve solutions in diverse industries and applications, such as chemical process, semiconductor/LCD manufacturing processes, pharmaceutical and others. Because of the extreme operating conditions such as high-temperature (${\sim}120^{\circ}C$) and high-pressure (~10 bar), the reliability of the valve is very important for minimizing in-line leakage and fugitive emissions of strong corrosive chemicals (hydrochloric acid, hydrofluoric acid, nitric acid, etc.) transported through the lines. In this study, we investigated the flow characteristics with flow coefficient in a PFA lined ball valve for different opening degrees using CFD analyses. The results should be the guidance for a new PFA lined ball valve design that will incorporate all the acclaimed and demonstrated benefits of the current design approaches.