• Korean Journal of Metals and Materials
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• v.48 no.7
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• pp.667-673
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• 2010

Copper filling into TSV (through-silicon-via) and reduction of the filling time for the three dimensional chip stacking were investigated in this study. A Si wafer with straight vias - $30\;{\mu}m$ in diameter and $60\;{\mu}m$ in depth with $200\;{\mu}m$ pitch - where the vias were drilled by DRIE (Deep Reactive Ion Etching) process, was prepared as a substrate. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to reduce the time required complete the Cu filling into the TSV, the PPR (periodic pulse reverse) wave current was applied to the cathode of a Si chip during electroplating, and the PR (pulse-reverse) wave current was also applied for a comparison. The experimental results showed 100% filling rate into the TSV in one hour was achieved by the PPR electroplating process. At the interface between the Cu filling and Ti/ Au functional layers, no defect, such as a void, was found. Meanwhile, the electroplating by the PR current showed maximum 43% filling ratio into the TSV in an hour. The applied PPR wave form was confirmed to be effective to fill the TSV in a short time.

• Korean Journal of Metals and Materials
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• v.50 no.2
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• pp.152-158
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• 2012

The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and $60{\mu}m$, respectively. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of $-5.85mA/cm^2$, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time.

• Current Optics and Photonics
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• v.2 no.2
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• pp.125-133
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• 2018

We report an in-depth analysis of the design and fabrication of multilayer dielectric (MLD) diffraction gratings for spectral beam combining at a wavelength of 1055 nm. The design involves a near-Littrow grating and a modal analysis for high diffraction efficiency. A range of wavelengths, grating periods, and angles of incidence were examined for the near-Littrow grating, for the $0^{th}$ and $-1^{st}$ diffraction orders only. A modal method was then used to investigate the effect of the duty cycle on the effective indices of the grating modes, and the depth of the grating was determined for only the $-1^{st}$-order diffraction. The design parameters of the grating and the matching layer thickness between grating and MLD reflector were refined for high diffraction efficiency, using the finite-difference time-domain (FDTD) method. A high reflector was deposited by electron-beam evaporation, and a grating structure was fabricated by photolithography and reactive-ion etching. The diffraction efficiency and laser-induced damage threshold of the fabricated MLD diffraction gratings were measured, and the diffraction efficiency was compared with the design's value.

• Korean Journal of Metals and Materials
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• v.49 no.5
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• pp.388-394
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• 2011

High speed copper filling into TSV (through-silicon-via) for three dimensional stacking of Si chips was investigated. For this study, a tapered via was prepared on a Si wafer by the DRIE (deep reactive ion etching) process. The via had a diameter of 37${\mu}m$ at the via opening, and 32${\mu}m$ at the via bottom, respectively and a depth of 70${\mu}m$. $SiO_2$, Ti, and Au layers were coated as functional layers on the via wall. In order to increase the filling ratio of Cu into the via, a PPR (periodic pulse reverse) wave current was applied to the Si chip during electroplating, and a PR (pulse reverse) wave current was applied for comparison. After Cu filling, the cross sections of the vias was observed by FE-SEM (field emission scanning electron microscopy). The experimental results show that the tapered via was filled to 100% at -5.85 mA/$cm^2$ for 60 min of plating by PPR wave current. The filling ratio into the tapered via by the PPR current was 2.5 times higher than that of a straight via by PR current. The tapered via by the PPR electroplating process was confirmed to be effective to fill the TSV in a short time.

• Journal of the Semiconductor & Display Technology
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• v.21 no.1
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• pp.95-102
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• 2022

Since the organic light-emitting diodes (OLEDs) have been widely investigated as next-generation displays, it has been successfully commercialized as a flexible and rollable display. However, there is still wide room and demand to improve the device characteristics such as power efficiency and lifetime. To solve this issue, there has been a wide research effort, and among them, the internal and the external light extraction techniques have been attracted in this research field by its fascinating characteristic of material independence. In this study, a micro-nano composite structured external light extraction layer was demonstrated. A reactive ion etching (RIE) process was performed on the surfaces of hexagonally packed hemisphere micro-lens array (MLA) and randomly distributed sphere diffusing films to form micro-nano composite structures. Random nanostructures of different sizes were fabricated by controlling the processing time of the O₂ / CHF₃ plasma. The fabricated device using a micro-nano composite external light extraction layer showed 1.38X improved external quantum efficiency compared to the reference device. The results prove that the external light extraction efficiency is improved by applying the micro-nano composite structure on conventional MLA fabricated through a simple process.

• The korean journal of orthodontics
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• v.27 no.5 s.64
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• pp.839-852
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• 1997

It has been submitted that different ion solutions containing sulfate induce crystal growth and might substitute conventional acid etching for pretreatment of enamel in orthodontic bonding(${\AA}rtun$ et al., Am. J. Orthod. 85, 333, 1984). This investigation was designed to evaluate the relevance of crystal growth on the enamel surface as an alternative to conventional acid etching in direct bonding of orthodontic brackets. Annexing Li2SO4, MgSO4, K2SO4 respectively in the solution with $25\%$ polyacrylic md 0.3M sulfuric acids were employed to enhance the crystal growth. Human bicuspids were treated with various parameters as combinations of crystal growth and glass ionomer cement, crystal growth and orthodontic resin, acid etching and orthodontic resin for an investigative purpose. Crystal growth solution containing MgSO4 showed the highest shear bond strength(15.6MPa) within the groups of bonding brackets with glass ionomer cement(p<0.01). Bonding with glass ionomer cement on the surface of crystal growth demonstrated higher shear bond strength than with orthodontic resin(p<0.001). Bonding with glass ionomer cement on the surface treated with crystal growth solution containing MgSO4 or K2SO4 was not different shear bond strength statistically from bonding with orthodontic resin on the acid-etched surface. It suggests that bonding brackets with glass ionomer cement on the surface treated with crystal growth solution containing MgSO4 or K2SO4 is a potential alternative to bonding with resin on the acid etched sufrace.

• Restorative Dentistry and Endodontics
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• v.27 no.4
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• pp.382-388
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• 2002

Compomer is composed of matrix and filler : matrix is made of the combination of resins and polycarboxylic molecules that are light-cured, and a filler is a glass component which is capable of ion-release. The resin content of compomers produces polymerization shrinkage which can adversely affect marginal adaptation. Pretreatment is a fundamental step which is treated with conditioner or primer in the use of these materials. Microleakage of restorative materials has been investigated mostly by dye penetration method. Dye penetration method was not quantitative and not measured repeatedly. Fluid filtration method, introduced and developed by Pashley's group, has been extensively used for 20 years for research purpose to understand the physiology of dentin, as well as the effects of various restorative treatments on dentin permeability. It permits quantitative, nondestructive measurment of microleakage in a longitudinal manner. The purpose of this study was to evaluate the change of dentin permeability according to the process of compomer restoration. In this study. Cl V cavities were prepared on buccal surface of thirty extracted human molars. The prepared cavities were etched by 37% phosphoric acid. The experimental teeth were randomly divided into three groups. Each group was treated with following materials Group 1 : Prime & Bond NT/Dyract AP, Group2： Single Bond/F2000 compomer, Group 3 : Syntac Single Component/Compoglass. The bonding agent and compomer were applied for each group following manufacturers information. Dentin permeability of each group was measured at each process by fluid filtration method; Step 1 : preparation(smear layer). Step 2 : etching(smear layer removal), Step 3 : applying the bonding agent, Step 4 : filling the compomer. Dentin permeability was expressed by hydraulic conductance ($\mu\textrm{l}$ min$^{-1}$cm$H_2O$$^{-1}$). The data were analysed statistically using One-way ANOVA and Sheffe's method. The results were as follows : 1. Dentin permeability differences between each process were significant except between step 1 and step 2(p<0.01). 2. Dentin permeability after removal of smear layer was highly increased(p<0.01). 3. In most case, decrease of dentin permeability was obtained by applying bonding agent(p<0.01). 4. Dentin permeability differences among the experimental groups were not significant(p>0.05). 5. None of compomers used in this study showed perfect seal at the interface.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.63-63
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• 2003

플라즈마 공정은 DRAM, 이종접합 양극성 트랜지스터(HBTs), 레이저, 평면도파로(planar lightwave circuit)와 같은 전자소자 및 광조자 제작에 있어서 핵심 공정중의 하나이다. 최근 미세 구조의 크기가 극도로 감소하게 됨에 따라 실제 소작 제작에 있어서 미세한 모양을 식각하는 공정이 매우 중요하게 되었다. 그 중에서 고밀도 유도결합 플라즈마(high density inductively coupled plasma)를 이용한 기술은 빠르고 정확한 식각률, 우수한 식각 균일도와 높은 재현성 때문에 습식식각 기술보다 선호되고 있다. 본 연구는 평판형(planar) 고밀도 유도결합 플라즈마 식각장치를 이용하여 BCl$_3$와 BCl$_3$/Ar 플라즈마에 따른 AlGaAs/GaAs의 식각결과를 비교 분석하였다. 공정 변수는 ICP 소스(source power)파워, RIE 척(chuck) 파워, 공정 압력, 그리고 Ar 조성비(0-100%)이었다. BCl$_3$에 Ar을 첨가하게 되면 순수한 BCl$_3$ 플라즈마에서의 AlGaAs/GaAs 식각률(> 3000 $\AA$/min) 보다 분당 약 1000$\AA$ 이상 높은 식각률(>4000 $\AA$/min)을 나타내었다. 이 결과는 Ar 플라즈마의 이온보조(ion-assisted)가 식각률 증가에 기인한다고 예측된다. 그리고 전자주사 현미경(SEM)과 원자력간 현미경(AFM)을 사용하여 식각 후 표면 거칠기 및 수직 측벽도 둥을 분석하였다. 마지막으로 XPS를 이용하여 식각된 후에 표면에 남아 있는 잔류 성분 분석을 연구하였다. 본 결과를 종합하면 BCl$_3$에 기초한 평판형 유도결합 플라즈마는 AlGaAs/GaAs 구조의 식각시 많은 우수한 특성을 보여주었다.79$\ell/\textrm{cm}^3$, 0.016$\ell/\textrm{cm}^3$, 혼합재료 2는 0.045$\ell/\textrm{cm}^3$, 0.014$\ell/\textrm{cm}^3$, 혼합재료 3은 0.123$\ell/\textrm{cm}^3$, 0.017$\ell/\textrm{cm}^3$, 혼합재료 4는 0.055$\ell/\textrm{cm}^3$, 0.016$\ell/\textrm{cm}^3$, 혼합재료 5는 0.031$\ell/\textrm{cm}^3$, 0.015$\ell/\textrm{cm}^3$, 혼합재료 6은 0.111$\ell/\textrm{cm}^3$, 0.020$\ell/\textrm{cm}^3$로 나타났다. 3. 단일재료의 악취흡착성능 실험결과 암모니아는 코코넛, 소나무수피, 왕겨에서 흡착능력이 우수하게 나타났으며, 황화수소는 펄라이트, 왕겨, 소나무수피에서 다른 재료에 비하여 상대적으로 우수한 것으로 나타났으며, 혼합충진재는 암모니아의 경우 코코넛과 펄라이트의 비율이 70%:30%인 혼합재료 3번과 소나무수피와 펄라이트의 비율이 70%:30%인 혼합재료 6번에서 다른 혼합재료에 비하여 우수한 것으로 나타났으며, 황화수소의 경우 혼합재료에 따라 약간의 차이를 보였다. 4. 코코넛과 소나무수피의 경우 암모니아가스에 대한 흡착성능은 거의 비슷한 것으로 사료되며, 코코넛의 경우 전량을 수입에 의존하고 있다는 점에서 국내 조달이 용이하며, 구입 비용도 적게 소요되는 소나무수피를 사용하는 것이 경제적이라고 사료된다. 5. 마지막으로 악취제거 미생물균주를 접종한 소나무수피 70%와 펄라이트 30%의 혼합재료를 24시간동안 장기간 운전

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.1-5
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• 2010

We developed a novel micro-electro mechanical systems (MEMS) test socket using silicon on insulator (SOI) substrate with the cantilever array structure. We designed the round shaped cantilevers with the maximum length of $350{\mu}m$, the maximum width of $200{\mu}m$ and the thickness of $10{\mu}m$ for $650{\mu}m$ pitch for 8 mm x 8 mm area and 121 balls square ball grid array (BGA) packages. The MEMS test socket was fabricated by MEMS technology using metal lift off process and deep reactive ion etching (DRIE) silicon etcher and so on. The MEMS test socket has a simple structure, low production cost, fine pitch, high pin count and rapid prototyping. We verified the performances of the MEMS test sockets such as deflection as a function of the applied force, path resistance between the cantilever and the metal pad and the contact resistance. Fabricated cantilever has 1.3 gf (gram force) at $90{\mu}m$ deflection. Total path resistance was less than $17{\Omega}$. The contact resistance was approximately from 0.7 to $0.75{\Omega}$ for all cantilevers. Therefore the test socket is suitable for BGA integrated circuit (IC) packages tests.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.319-322
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• 2003

To match the charge induced by the insulators $CeO_2$ with the remanent polarization of ferro electric SBT thin films, areas of Pt/SBT/Pt (MFM) and those of $Pt/CeO_2/Si$ (MIS) capacitors were ind ependently designed. The area $S_M$ of MIS capacitors to the area $S_F$ of MFM capacitors were varied from 1 to 10, 15, and 20. Top electrode Pt and SBT layers were etched with for various area ratios of $S_M\;/\;S_F$. Bottom electrode Pt and $CeO_2$ layers were respectively deposited by do and rf sputtering in-situ process. SBT thin film were prepared by the metal orgnic decomposition (MOD) technique. $Pt(100nm)/SBT(350nm)/Pt(300nm)/CeO_2(40nm)/p-Si$ (MFMIS) gate structures have been fabricated with the various $S_M\;/\;S_F$ ratios using inductively coupled plasma reactive ion etching (ICP-RIE). The leakage current density of MFMIS gate structures were improved to $6.32{\times}10^{-7}\;A/cm^2$ at the applied gate voltage of 10 V. It is shown that in the memory window increase with the area ratio $S_M\;/\;S_F$ of the MFMIS structures and a larger memory window of 3 V can be obtained for a voltage sweep of ${\pm}9\;V$ for MFMIS structures with an area ratio $S_M\;/\;S_F\;=\;6$ than that of 0.9 V of MFS at the same applied voltage. The maximum memory windows of MFMIS structures were 2.28 V, 3.35 V, and 3.7 V with the are a ratios 1, 2, and 6 at the applied gate voltage of 11 V, respectively. It is concluded that ferroelectric gate capacitors of MFMIS are good candidates for nondestructive readout-nonvolatile memories.