• Title/Summary/Keyword: Inductance simulation

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A Small Antenna of High Radiation Efficiency Employing a Ground Radiator (그라운드 방사체를 활용한 고효율의 소형 안테나)

  • Choi, Hyeng-Cheul;Lee, Hyung-Jin;Park, Bum-Ki;Jang, Jin-Hyuk;Kim, Hyeong-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.2
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    • pp.135-143
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    • 2012
  • This paper introduces the method to utilize a terminal ground as a radiator only using reactive components without an antenna structure. Characteristics of the proposed antenna is compared with that of the meander IFA on the same ground plane($40{\times}20mm^2$) for the bluetooth band. From simulation and measurement data, it is found that the proposed antenna using only capacitors provides the highest radiation efficiency. This is because of that the higher inductance reduces radiation resistance of a ground and the capacitor has a lower loss resistance comparing to that of the IFA or the inductor. In spite of the high radiation efficiency, the area ($5{\times}2.5mm^2$) of the proposed antenna is less than half of the area ($12{\times}2.5mm^2$) of the IFA.

Fabrication and Small scale Short Circuit Tests of Hybrid Fault Current Limiter Employing Asymmetric Non-Inductive Coil and Fast Switch (이종초전도 코일을 이용한 하이브리드형 한류기의 제작 및 단락실험)

  • Jang, Jae-Young;Kim, Young-Jae;Na, Jin-Bae;Choi, Suk-Jin;Lee, Woo-Seung;Lee, Chang-Young;Park, Dong-Keun;Ko, Tae-Kuk
    • Progress in Superconductivity and Cryogenics
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    • v.13 no.1
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    • pp.41-45
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    • 2011
  • Hybrid fault current limiters (FCL) have been researched at Yonsei University. The hybrid FCL has advantages such as having a rapid response to a sudden fault situation and a fast recovery time from a quench. It consists of an asymmetric HTS coil, a switching module, and a bypass reactor. The asymmetric HTS coil is wound with two different types of HTS wires in an opposite direction so that it has nearly zero inductance at the superconducting state. When the quench occurs at the fault state, a strong magnetic field is generated from the asymmetric coil because of different quench characteristics of two HTS wires, and then a repulsive force is induced in the switching module. The force opens the switch and the fault current is pushed into the bypass reactor. In this research, we analyzed the cause of the repulsive force and confirmed, experimentally and computationally, that the magnitude of a repulsive force is varied by changing the gap distance between the asymmetric coil and the switching module. By using the FEM simulation, we calculated the repulsive force with respect to the gap distance and verified that the effect of the gap distance. Then, short circuit test was carried out to confirm the correct operation of the fast switch.

High-Frequency Modeling of Printed Spiral Coil Probes for Radio-Frequency Interference Measurement (무선주파수 간섭 측정을 위한 Printed Spiral Coil (PSC) 프로브의 고주파 모델링)

  • Kim, yungmin;Song, Eakhwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.1
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    • pp.10-19
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    • 2018
  • In this paper, a new high-frequency equivalent circuit model of printed spiral coils (PSCs) for radio-frequency interference (RFI) measurement has been proposed. To achieve high-frequency modeling, the proposed model consists of distributed components designed based on the design parameters of the PSCs. In addition, an analytic model for PSCs based on T-pi conversion has been proposed. To investigate the feasibility of the proposed model for RFI measurement, the transfer function between a microstrip line and a PSC has been extracted by combining the proposed model and mutual inductance. The self-impedances of the proposed model and the transfer function have been successfully validated using three-dimensional field simulation and measurements, revealing noticeable correlations up to a frequency of 6 GHz. The proposed model can be employed for high-frequency probe design and RFI noise estimation in the gigahertz range wireless communication bands.

Transformer Design Methodology to Improve Transfer Efficiency of Balancing Current in Active Cell Balancing Circuit using Multi-Winding Transformer (다중권선 변압기를 이용한 능동형 셀 밸런싱 회로에서 밸런싱 전류 전달 효율을 높이기 위한 변압기 설계 방안)

  • Lee, Sang-Jung;Kim, Myoung-Ho;Baek, Ju-Won;Jung, Jee-Hoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.4
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    • pp.247-255
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    • 2018
  • This paper proposes a transformer design of a direct cell-to-cell active cell balancing circuit with a multi-winding transformer for battery management system (BMS) applications. The coupling coefficient of the multi-winding transformer and the output capacitance of MOSFETs significantly affect the balancing current transfer efficiency of the cell balancing operation. During the operation, the multi-winding transformer stores the energy charged in a specific source cell and subsequently transfers this energy to the target cell. However, the leakage inductance of the multi-winding transformer and the output capacitance of the MOSFET induce an abnormal energy transfer to the non-target cells, thereby degrading the transfer efficiency of the balancing current in each cell balancing operation. The impacts of the balancing current transfer efficiency deterioration are analyzed and a transformer design methodology that considers the coupling coefficient is proposed to enhance the transfer efficiency of the balancing current. The efficiency improvements resulting from the selection of an appropriate coupling coefficient are verified by conducting a simulation and experiment with a 1 W prototype cell balancing circuit.

Design of the Voltage Controlled Oscillator for Low Voltage (저전압용 전압제어발진기의 설계)

  • Lee, Jong-In;Jung, Dong-Soo;Jung, Hak-Kee;Yoon, Young-Nam;Lee, Sang-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.11
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    • pp.2480-2486
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    • 2012
  • The design of low voltage LC-VCO(LC Voltage Controlled Oscillator) has been presented to optimize the phase noise and power consumption for the block of frequency synthesis to satisfy WCDMA system specification in this paper. The parameters for minimum phase noise has been obtained in the region of design, using the lines of the tuning range and the excess gain in the plane of the inductance and the transconductance of MOS transistor to compensate the loss of LC-tank. As a result of simulation, the phase noise characteristics is -113dBc/Hz for offset of 1MHz. The optimum designed LC-VCO has been fabricated using the process of 0.25um CMOS. As a result of measurement for fabricated chip, the phase noise characteristics is -116dBc/Hz for offset of 1MHz. The power consumption is 15mW, and Kvco is 370MHz/V.

Macromodels for Efficient Analysis of VLSI Interconnects (VLSI 회로연결선의 효율적 해석을 위한 거시 모형)

  • 배종흠;김석윤
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.5
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    • pp.13-26
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    • 1999
  • This paper presents a metric that can guide to optimal circuit models for interconnects among various models, given interconnect parameters and operating environment. To get this goal, we categorize interconnects into RC~c1ass and RLC-c1ass model domains based on the quantitative modeling error analysis using total resistance, inductance and capacitance of interconnects as well as operating frequency. RC~c1ass circuit models, which include most on~chip interconnects, can be efficiently analyzed by using the model~order reduction techniques. RLC-c1ass circuit models are constructed using one of three candidates, ILC(Iterative Ladder Circuit) macromodels, MC(Method of Characteristics) macromodels, and state-based convolution method, the selection process of which is based upon the allowable modeling error and electrical parameters of interconnects. We propose the model domain diagram leading to optimal circuit models and the division of model domains has been achieved considering the simulation cost of macromodels under the environmental assumption of the general purpose circuit simulator such as SPICE. The macromodeling method presented in this paper keeps the passivity of the original interconnects and accordingly guarantees the unconditional stability of circuit models.

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Novel Lumped Element Backward Directional Couplers Based on the Parallel Coupled-Line Theory (평행 결합선로 이론에 근거한 새로운 집중 소자형 방향성 결합기)

  • 박준석;송택영
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.10
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    • pp.1036-1043
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    • 2003
  • In this paper, novel lumped equivalent circuits for a conventional parallel directional coupler are proposed. This novel equivalent circuits only have self inductance and self capacitance, so we can design exact lumped equivalent circuit. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even- and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3 dB and 10 dB lumped element directional couplers at the center frequency of 100 MHz and 2 GHz, respectively a chip type directional coupler has been designed with multilayer configurations by employing commercial EM simulator. Designed chip-type directional couplers have a 3 dB-coupling value at the center frequency of 2 GHz and fabricated lumped directional coupler on fr4 organic substrate has a 3 dB, 10 dB-coupling values at the center frequency of 100 MHz. Excellent agreements between simulation results and measurement results on the designed directional couplers show the validity of this paper. Furthermore, in order to adapt to multi-layer process such as Low Temperature Cofired Ceramic (LTCC), chip-type lumped element couplers have been designed by using this method.

Design Optimization of High-Voltage Pulse Transformer for High-Power Pulsed Application (고출력 펄스응용을 위한 고전압 펄스변압기 최적설계)

  • Jang, S.D.;Kang, H.S.;Park, S.J.;Han, Y.J.;Cho, M.H.;NamKung, W.
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1297-1300
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    • 2008
  • A conventional linear accelerator system requires a flat-topped pulse with less than ${\pm}$ 0.5% ripple to meet the beam energy spread requirements and to improve pulse efficiency of RF systems. A pulse transformer is one of main determinants on the output pulse voltage shape. The pulse transformer was investigated and analyzed with the pulse response characteristics using a simplified equivalent circuit model. The damping factor ${\sigma}$ must be >0.86 to limit the overshoot to less than 0.5% during the flat-top phase. The low leakage inductance and distributed capacitance are often limiting factors to obtain a fast rise time. These parameters are largely controlled by the physical geometry and winding configuration of the transformer. A rise time can be improved by reducing the number of turns, but it produces larger pulse droop and requires a larger core size. By tradeoffs among these parameters, the high-voltage pulse transformer with a pulse width of 10 ${\mu}s$, a rise time of 0.84 ${\mu}s$, and a pulse droop of 2.9% has been designed and fabricated to drive a klystron which has an output voltage of 284 kV, 30-MW peak and 60-kW average RF output power. This paper describes design optimization of a high-voltage pulse transformer for high-power pulsed applications. The experimental results were analyzed and compared with the design. The design and optimal tuning parameter of the system was identified using the model simulation.

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A SRM driving with voltage and switching angle for maximum torque/efficiency and minimum torque ripple (최대 토크/효율 및 최소 토크맥동을 위한 스위칭각/전압에 의한 SRM 운전)

  • 차현록;김현덕;김광현;임영철;장도현
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.4
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    • pp.309-317
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    • 2000
  • This paper presents the switching angle and voltage to maximize torque/efficiency and minimize torque ripple in the 4-phase 6-poles Switched Reluctance Motor(SRM). SRM drive has high saturation and nonlinear characteristics of inductance. So we cannot hard to find optimal condition by using analytic method. Therefore it is hard to find the operating the switching angle and voltage through the approximated analysis and computer simulation by using SIMULINK according to the speed and torque required by load. From the results, we can say that the optimum average voltage is determined by the load only and the speed is determined by the optimum turn-on/off angle only. And the maximum efficiency and minimum torque ripple depend on switching angle, not on voltage. And then one-chip microcontroller controls the switching angle and voltage of an asymmetrical inverter in the SRM driver. This drive method, which is expect that the driving methods, which are maximizing torque/efficiency and minimizing torque ripple, will be suitable for the electric vehicle, the industrial application and household appliances.

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Variable Gain Current Controller Considering Inductance Variations after the Connection of DFIG Stator to the Grid (DFIG 고정자의 계통연계시 인덕턴스 변동을 고려한 가변이득 전류제어기)

  • Shin, Soo-Cheol;Yu, Jae-Sung;Hong, Jung-Ki;Suh, In-Young;Song, Seung-Ho
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.4
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    • pp.293-298
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    • 2009
  • This paper presents a variable gain current control algorithm for the stabilized grid connection between the grid and a doubly fed induction(DFIG) as a wind power generator. The performance of a RSC current controller depends highly on accurate machine parameters, and especially requires a fast and robust response regardless of the disturbances such as voltage sag. However, parameter variations of a DFIG occur at the point of grid connection, which affects the current controller gains based on DFIG parameters after a DFIG is connected to the grid. Thus, performance degrades when actual machine parameters depart from values used in the control system. In the proposed algorithm, current controller gains of the rotor side converter(RSC) are changed after a DFIG is connected to the grid. The simulation results and experimental results for a 750kW are shown to illustrate the feasibility of the proposed algorithm.