• Journal of the Korea Society for Simulation
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• v.27 no.3
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• pp.23-36
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• 2018

Discrete Event System Specification (DEVS) has been used for decades as it provides sound semantics for hierarchical modular specification of discrete event systems. Instead of the mathematical specification, the DEVS diagram, based on the structured DEVS formalism, has provided more intuitive and convenient representation of complex DEVS models. This paper proposes a clean room process for implementation and verification of a DEVS diagram model specification into a simulation software source code. Specifically, it underlies a sequence of transformation steps from conformance and integrity checking of a given diagram model, translation into a corresponding tabular model, and finally conversion to a simulation source code, with each step being inversely verifiable for traceability. A simple example helps developers to understand the proposed process with associated transformation methods; a case study shows that the proposed process is effective for and adaptable to practical simulation software development.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.706-710
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• 2003

In this paper, we will present brief design feature, implementations, and tests for verification of KOMPSAT-2 simulator, which is a subsystem of KOMPSAT-2 MCE. SIM is implemented on PC server to minimize costs and troubles on embedding onboard flight software into SIM, OOA/OOD methodology is employed to maximized S/W reusability, and XML is used for S/C characteristics, TC, TM and Simulation data instead of commercial DB. Consequently, we can reduce costs for the system, efforts embedding flight software, and maximize software reusability. SIM subsystem test was performed successfully.

• Journal of the Korea Society for Simulation
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• v.18 no.3
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• pp.113-122
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• 2009

Software is getting more complex due to a variety of requirements that include desired functions and properties. Therefore, verifying and testing the software are complicated problems. Moreover, if the software is already implemented, inserting and deleting tracing/logging code into the source code may cause several problems, such as the code tangling and the code scattering problems. This paper proposes the Aspect DEVS Verification Framework which supports the verification and testing process. The Aspect DEVS Verification Framework utilizes Aspect Oriented Programming features to handle the code tangling and the code scattering problems. By applying aspect oriented features, a user can find and fix the inconsistency between requirement and implementation of a software without suffering the problems. The first step of the verification process is the building aspect code to make a software act as a generator. The second step is developing a requirement specification using DEVS diagrams and implementing it using the DEVSIM++. The final step is comparing the event traces from the software with the possible execution sequences from DEVS model.

• Journal of Institute of Control, Robotics and Systems
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• v.16 no.7
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• pp.655-660
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• 2010

As increasing the number of Electronic Control Units in a vehicle, the proportion for reliability and stability of the software is going increasingly. Accordingly, the traditional CAN network has occurred the situation that the requirement of developing vehicle software is not sufficient. To solve these problems, the FlexRay network which is ensured the high bandwidth and real-time is generated. However it is difficult to implement FlexRay based application software because of complex protocol than traditional CAN network. Accordingly the system for analysis and verification of network state is needed. Also vehicle vendor develops application software using Matlab/Simulink in order to increase productivity. But this development method is hard to solve the network problem of node to node. Therefore this paper implements Matlab/Simulink based FlexRay network system and verifies it through comparing with existing embedded system.

• Nuclear Engineering and Technology
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• v.48 no.2
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• pp.404-418
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• 2016

This paper presents a documentation and development method to facilitate the certification of scientific computing software used in the safety analysis of nuclear facilities. To study the problems faced during quality assurance and certification activities, a case study was performed on legacy software used for thermal analysis of a fuelpin in a nuclear reactor. Although no errors were uncovered in the code, 27 issues of incompleteness and inconsistency were found with the documentation. This work proposes that software documentation follow a rational process, which includes a software requirements specification following a template that is reusable, maintainable, and understandable. To develop the design and implementation, this paper suggests literate programming as an alternative to traditional structured programming. Literate programming allows for documenting of numerical algorithms and code together in what is termed the literate programmer's manual. This manual is developed with explicit traceability to the software requirements specification. The traceability between the theory, numerical algorithms, and implementation facilitates achieving completeness and consistency, as well as simplifies the process of verification and the associated certification.

• Journal of Aerospace System Engineering
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• v.17 no.6
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• pp.133-143
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• 2023

This paper describes the system integration laboratory's requirement analysis, implementation, and verification for multiple-scenario unmanned aerial vehicle operation and control technology using a manned rotorcraft for Manned-Unmanned Teaming. System integration laboratory consists of manned rotorcraft flight simulation, unmanned aerial vehicle flight and mission equipment simulation, ground control system simulation for unmanned aerial vehicle control and change in the control authority between the ground control system and manned rotorcraft, and operation and control system for mission plan's writing and transmission. Each implemented simulation verified the requirements through software and hardware integration test.

• Proceedings of the Korean Information Science Society Conference
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• 2006.06a
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• pp.226-228
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• 2006

In this paper we describe a simulation and development framework for designing mobile 3D graphics architectures. We are developing a simple and flexible simulation and verification environment (SVE) that uses gITrace's ability to intercept and redirect an OpenGL/ES streams. In combination wlth gITrace to trace OpenGL/ES commands, the SVE simulates the behavior of mobile 3D graphics pipeline during playback of traces, and then produces the second geometry trace that can be used as a test vector for the Verilog/HDL RT-level model. By comparing the frame-by-frame results, we can conduct architectural verification. To demonstrate the functionality of the SVE, we show the implementation of the verified mobile 3D architecture on a FPGA board. For this, we also present an application development environment (ADE) includes a mobile graphics API and a device driver interface (DDI). The proposed two software environments, the SVE and the ADE could be used fer developing and testing mobile applications, architectural study and speculative hardware designs.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.639-642
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• 2009

When the graphics accelerator for high-quality multimedia content design, hardware verification environment, easy and accurate performance evaluation in an embedded device is required. To work around this is not verified through the simulation waveform analysis to determine the actual calculated graphic images has designed a software rasterizer. Rasterizer is designed for Windows-based environment using the C language implementation of rasterization has a function at each step. Vertex data is entered and the results were verified.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.11a
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• pp.779-781
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• 2007

Nowadays, as the increasing functionality and scales of embedded systems, system design grows more complex than before. So verification and simulation of systems become an important facet in hardware-software co-design issues. But it is almost impossible to simulate an embedded system without real hardware implementation or environment communication, especially for control-dominated reactive systems. Therefore, in this paper, we will introduce a GUI environment module generator for integrated Esterel\C++ simulation. By generating the GUI modeling environment, we can simulate and verify the whole embedded system conveniently.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.44 no.8
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• pp.657-665
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• 2016

Launch Control System(LCS) performs the pre-launch preparation and launch operation during launch campaign. The successful launch operation is basically influenced by hardware and software of LCS. Especially, a trivial errors in control algorithm can cause critical problem or disaster in launch operation. Therefore, the hidden or implicit errors should be distinguished and eliminated by the verification test in advance. In this paper, the design and implementation of hardware and software simulator which have already been used in LCS verification will be introduced. By presenting the detailed design and flowchart-based algorithms, we make other similar systems adopt the implementation philosophies of this paper. Especially, this paper emphasizes that all the simulation algorithms work on the self-controller in LCS without using separated computer or PLC.