• Journal of the Korea Institute of Military Science and Technology
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• v.9 no.3
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• pp.116-122
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• 2006

A fast scan digital-IF FFT receiver at the radio communication band is presented for spectrum monitoring applications. It is composed of three parts: RF front-end, fast LO board, and signal processing board. It has about 19GHz/s scan rate, multi frequency resolution from 10kHz to 2.5kHz, and high sensitivity of below -99dBm. The design and performance analysis of the digital-IF FFT receiver are presented.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.894-897
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• 2003

Recently, the rapid growth of mobile radio system has led to an increasing demand of low-cost high performance communication IC's. In this paper, we have designed RF front end for wireless LAN receiver employ zero-IF architecture. A low-noise amplifier (LNA) and double-balanced mixer is included in a front end. The zero-IF architecture is easy to integrate and good for low power consumption, so that is coincided to requirement of wireless LAN. But the zero-IF architecture has a serious problem of large offset. Image-reject mixer is a good structure to solve offset problem. Using offset compensation circuit is good structure, too. The front end is implemented in 0.25 ${\mu}m$ CMOS technology. The front end has a noise figure of 5.6 dB, a power consumption of 16 mW and total gain of 22 dB.

• Proceedings of the IEEK Conference
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• 2000.06a
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• pp.69-72
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• 2000

This paper shows the more improved design of MRI receiver compared to conventional one based on Elscint Spectrometer. At first, the low-cost ADC is 16 bits, 3MHz sampling A/D converter Comparing to conventional one with signal bits of 14 bits, this device with those of 16 bits helps getting Improved the image resolution improved. If frequency is designed centering around 7.6 MHz to be satisfied in 10 MHz of maximum input bandwidth of ADC. For 1st demodulation, fixed IF is used for the purpose of the implementing multi nuclei system. Control parts & partial digital parts are integrated on one chip(FPGA). In DDC(Digital Down Converter), we got required bandwidth of LPF by controlling its decimation rate. With above considerations, we designed optimal receiver for high resolution imaging to be implemented through PC interface & experimental test of receiver of MRI after receiver's fabrication.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.507-513
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• 2002

In this paper, the receiver using Heterodyne type is designed and implemented for a pulse radar at 9.4 GHz. The If amplifier, which occupies a significant size in a Heterodyne receiver for pulse radars, can be removed. Furthermore, by using detector logarithmic video amplifier in baseband, the receiver has a small size and it's characteristic shows a high dynamic range and sensitivity. From the results of measurements, the minimum receiver power of -70 dBm and selectivity of 55 dB are obtained.

• Journal of Advanced Navigation Technology
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• v.13 no.3
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• pp.319-326
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• 2009

In this paper, the key technologies of Navigation receiver for GNSS sensor station are presented as a development result of a GNSS ground station in ETRI. A wide-band antenna and RF/IF components and SW signal processing unit to cover the GPS and Galileo signals for GNSS receiver are developed and its performance is verified by using GPS live signal and GNSS RF signal simulator from SpirentTM. We also gather GIOVE-A signal by using H/W antenna and RF/IF units in IF-level as sampling frequency and bit number, 112MHz and 8bits, respectively by using the developed wide-band antenna and RF/IF components. Data acquisition is done by using commercial data acquisition device from National Instrument TM. The gathered data is fed into SW receiver to process Galileo E1 to verify Galileo signal processing by Galileo live signal from GIOVE-A.

• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.61-67
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• 2014

This paper presents a zero-IF CMOS RF receiver, which supports three channel bandwidths of 5/10/40MHz for LTE-Advanced systems. The receiver operates at IMT-band of 2,500 to 2,690MHz. The simulated noise figure of the overall receiver is 1.6 dB at 7MHz (7.5 dB at 7.5 kHz). The receiver is composed of two parts: an RF front-end and a baseband circuit. In the RF front-end, a RF input signal is amplified by a low noise amplifier and $G_m$ with configurable gain steps (41/35/29/23 dB) with optimized noise and linearity performances for a wide dynamic range. The proposed baseband circuit provides a -1 dB cutoff frequency of up to 40MHz using a proposed wideband OP-amp, which has a phase margin of $77^{\circ}$ and an unit-gain bandwidth of 2.04 GHz. The proposed zero-IF CMOS RF receiver has been implemented in $0.13-{\mu}m$ CMOS technology and consumes 116 (for high gain mode)/106 (for low gain mode) mA from a 1.2 V supply voltage. The measurement of a fabricated chip for a 10-MHz 3G LTE input signal with 16-QAM shows more than 8.3 dB of minimum signal-to-noise ratio, while receiving the input channel power from -88 to -12 dBm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.8
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• pp.638-643
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• 2013

Chaos communication system has a sensitive characteristic to initial conditions, because completely another signal is generated when initial condition of chaos equation is changed subtly. Also, chaos communication systems have the characteristics of non-periodic, non-predictability, the broadband signal, such as ease of implementation. Due to these characteristics, security of chaos communication system generally is evaluated better than other systems. However, BER(Bit Error Rate) performance is evaluated worse than other digital system, because existing chaos communication system's transmitter and receiver are strong influence by interference signal and noise. So, research to improve the BER performance of the chaotic communication system is performed continuously. In this paper, We will propose a new CDSK(Correlation Delay Shift Keying) receiver for BER performance improvement. After we compare to the performance of existing CDSK receiver and proposed CDSK receiver, BER performance of proposed CDSK receiver evaluate. Also, when using the new CDSK receiver, we evaluate the BER performance according to the spreading factors and find an optimum spreading factor. If chaos communication system use a new CDSK receiver, BER performance is improved than existing CDSK receiver. Also, if spreading factor's value is increased, BER performance is improved, because it is not nearly affected by interference signal and noise.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.6
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• pp.286-295
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• 2006

This paper presents a design of a real-time software GPS receiver which runs on a PC. The software GPS receiver has advantages over conventional hardware based receivers in terms of flexibility and efficiency in application oriented system design and modification. In odor to reduce the processing time of the software operations in the receiver, a shared memory structure is used with a dynamic data control, and the byte-type IF data is processed through an Open Multi-Processing technique in the mixer and integrator which requires the most computational load. A high speed data acquisition device is used to capture the incoming high-rate IF signals. The FFT-IFFT correlation technique is used for initial acquisition and FLL assisted PLL is used for carrier tracking. All software modules are operated in sequence and are synchronized with pre-defined time scheduling. The performance of the designed software GPS receiver is evaluated by running it in real-time using the real GPS signals.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.44-48
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• 2002

This paper describes an adaptive signal processing of digital receiver with DDC(Digital Down Convertor), DDC is implemented by using NCO(Numerically Controlled Oscillator), digital low pass filter. for the passband sampling, we present the results of digital receiver simulation with DDC. We confirm that the low IP signal is converted to zero IF by DDC. DOA(Direction Of Arrival) estimation technique using MUSIC(Multiple SIgnal Classification) algorithm with high resolution is presented. We Cow that an accurate resolution of DOA depends on the input sampling number.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.2
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• pp.10-20
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• 1997

This paper describes the design, the manufacture and the development of th eautomatic gain control unit which ajdusts the gain of IF processor in the high sensitive & multifunctional receiver unit (HMR) for pulse doppler radar system. Accodording to the effective distnce of target, radar cross section, and a lot of external environments (such as clutter), the receiving stage of RADAR system often deviates from dynamic range. To solve this kind o fproblem, continuous/pulse wave AGC are realized, make it possible to control the gain characteristics of receiver stably, and can increase dynamic range linearly by adjusting the gain slope of receiver which is limited by 1-dB gain compression point. In this study, AGC unit is designed to regulate the total gain of receiver by using te analog feedback theory. It also has rapid enough response to process pulse signal. This study presents the gain control method of IF, the real manufacture technique (the package-type components) and the measurement performance of AGC.