• Title/Summary/Keyword: IC package

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Pattern Partitioning and Decision Method in the Semiconductor Chip Marking Inspection (반도체 부품 마크 미세 결함 검사를 위한 패턴 영역 분할 및 인식 방법)

  • Zhang, Yuting;Lee, Jung-Seob;Joo, Hyo-Nam;Kim, Joon-Seek
    • Journal of Institute of Control, Robotics and Systems
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    • v.16 no.9
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    • pp.913-917
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    • 2010
  • To inspect the defects of printed markings on the surface of IC package, the OCV (Optical Character Verification) method based on NCC (Normalized Correlation Coefficient) pattern matching is widely used. In order to detect the micro pattern defects appearing on the small portion of the markings, a Partitioned NCC pattern matching method was proposed to overcome the limitation of the NCC pattern matching. In this method, the reference pattern is first partitioned into several blocks and the NCC values are computed and are combined in these small partitioned blocks, rather than just using the NCC value for the whole reference pattern. In this paper, we proposed a method to decide the proper number of partition blocks and a method to inspect and combine the NCC values of each partitioned block to identify the defective markings.

Strength Evaluation of Bonded Dissimilar Materials by Using Stress Singularity Factor (응력특이성계수에 의한 이종 접합재료의 강도평가)

  • Jeong, Nam-Yong;O, Bong-Taek
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.20 no.7
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    • pp.2087-2096
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    • 1996
  • Recentrly advantages in composite and light weight material techniques have led to the increased use of bonded dissimilar materials such as ceramics/metal bonded joints, IC package, brazing, coating and soldering in the various industries. It is required to analyze the evaluation method of fracture strength and design methodology of bonded joints in dissimilar materials. Stress singularity according to changes of scarf angles for bonded scarf joints in dissimilar materials was investigated by the boundary element method and static experiments. In this paper, effect of the stress singularity factors at the interface edges of scarf joints on various dissmilar materials combinations were investigated by analysis of its stress and stress singularity index using 2-dimensional elastic program of boundary element method. And the variations of stress singularity index by changes for Young's modulus ratios of materials and scarf angles were investigated. Also, it is found that stress singularities at bonded interface edges are disappeared for certain combination of scarf angle in a pair of bonded dissimilar materials. As the results, it is proposed that the strength evaluation by using stress singularity factors, $\Gamma$, considering stress singularity at the interface edges of bonded dissimilar materials, is very useful.

The Effect of Ultrasonic Vibration Table on ELID Grinding Process of Aluminum Nitride Ceramics (초음파 진동 테이블이 질화알루미늄 세라믹의 ELID 연삭 가공에 미치는 영향)

  • Kwak, Tea-Soo;Jung, Myung-Won;Kim, Geon-Hee;Kwak, Ihn-Sil
    • Journal of the Korean Society for Precision Engineering
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    • v.30 no.12
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    • pp.1237-1243
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    • 2013
  • This study has focused on the effect of ultrasonic vibration table in ELID grinding process of aluminum nitride ceramics. Aluminum nitride ceramics has superior physical and chemical properties and widely used in IC, LSI substrate, package and so on. To achieve the high effective machining of brittle and high strength ceramics as like aluminum nitride, machining method combined ELID grinding and ultrasonic vibration has been adopted in this study. From the experimental results, material removal rate, MRR has been increased maximum 36 percent and spindle resistance has been decreased in using ultrasonic table. Surface roughness of ground surface became a little worse in using ultrasonic table but was somewhat improved in feed direction.

Design of Optical Polarizer using Three-channel Rib-type Couplers (세 채널 Rib형 결합기를 이용한 광 편파기 설계)

  • Hong, Kwon-Eui;Lee, Won-Seock;Ho, Kwang-Chun
    • Journal of IKEEE
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    • v.7 no.1 s.12
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    • pp.16-21
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    • 2003
  • A rigorous modal transmission-line theory (MTLT) based on effective dielectric method (EDM) is introduced and developed to analyze the polarization beam-splitting of optical rib-type directional coupler with three guiding layers. Furthermore, to confirm the validity of approach proposed in this paper, we compare our results with those ones of BeamPROP, which is a commercial software package used widely. Consequently, the numerical results reveal that the hybrid modes incident into a guiding channel of rib-type coupler are split well through upper and lower guiding channels in a polarization length.

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Design of Planar Power Divider Combiner for K-Band and Improvement of Impedence Matching Condition (K-밴드 평면형 Power Divider / Combiner와 정합특성에 관한 연구)

  • 나극환;홍의석;강준길;김춘길
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.14 no.6
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    • pp.579-589
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    • 1989
  • In this paper, planar power dividers/combiners for millimeter waves K-band or bands which can be printed on the substrates of hybrid or monolithic IC by surface mounting are designed and studied. Power dividers/combiners, and the conductor loss of microstrip lines in particualr the existing Wilkinson power dividers/combiners is modified ad amployes by ist equivalent circuit. Microwave CAD program SUPEROMPACT is employed for the Wilkinson power combiner which is modified and analyzed to reduce the high frequency coupling between the branches of the combiner, and the method to diminish the sensitivity of the input reflection of $2^n$-way power dividers/combiners is studied employing the commerical microwave CAD program package SUPERCOMPACT.

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A Triple-Band Transceiver Module for 2.3/2.5/3.5 GHz Mobile WiMAX Applications

  • Jang, Yeon-Su;Kang, Sung-Chan;Kim, Young-Eil;Lee, Jong-Ryul;Yi, Jae-Hoon;Chun, Kuk-Jin
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.295-301
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    • 2011
  • A triple-band transceiver module for 2.3/2.5/3.5 GHz mobile WiMAX, IEEE 802.16e, applications is introduced. The suggested transceiver module consists of RFIC, reconfigurable/multi-resonance MIMO antenna, embedded PCB, mobile WiMAX base band, memory and channel selection front-end module. The RFIC is fabricated in $0.13{\mu}m$ RF CMOS process and has 3.5 dB noise figure(NF) of receiver and 1 dBm maximum power of transmitter with 68-pin QFN package, $8{\times}8\;mm^2$ area. The area reduction of transceiver module is achieved by using embedded PCB which decreases area by 9% of the area of transceiver module with normal PCB. The developed triple-band mobile WiMAX transceiver module is tested by performing radio conformance test(RCT) and measuring carrier to interference plus noise ratio (CINR) and received signal strength indication (RSSI) in each 2.3/2.5/3.5 GHz frequency.

Estimation of Transferred Power from a Noise Source to an IC with Forwarded Power Characteristics

  • Pu, Bo;Kim, Taeho;Kim, SungJun;Kim, Jong-Hyeon;Kim, SoYoung;Nah, Wansoo
    • Journal of electromagnetic engineering and science
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    • v.13 no.4
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    • pp.233-239
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    • 2013
  • This paper proposes an accurate approach for predicting transferred power from a noise source to integrated circuits based on the characteristics of the power transfer network. A power delivery trace on a package and a printed circuit board are designed to transmit power from an external source to integrated circuits. The power is demonstrated between an injection terminal on the edge of the printed circuit board and integrated circuits, and the power transfer function of the power distribution network is derived. A two-tier calibration is applied to the test, and scattering parameters of the network are measured for the calculation of the power transfer function. After testing to obtain the indispensable parameters, the real received and tolerable power of the integrated circuits can be easily achieved. Our proposed estimation method is an enhancement of the existing the International Electrotechnical Commission standard for precise prediction of the electromagnetic immunity of integrated circuits.

Determination of New Layout in a Semiconductor Packaging Substrate Line using Simulation and AHP/DEA (시뮬레이션과 AHP/DEA를 이용한 반도체 부품 생산라인 개선안 결정)

  • Kim, Dong-Soo;Park, Chul-Soon;Moon, Dug-Hee
    • IE interfaces
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    • v.25 no.2
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    • pp.264-275
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    • 2012
  • The process of semiconductor(IC Package) manufacturing usually includes lots of complex and sequential processes. Many kinds of equipments are installed with the mixed concept of serial and parallel manufacturing system. The business environments of the semiconductor industry have been changed frequently, because new technologies are developed continuously. It is the main reason of new investment plan and layout consideration. However, it is difficult to change the layout after installation, because the major equipments are expensive and difficult to move. Furthermore, it is usually a multiple-objective problem. Thus, new investment or layout change should be carefully considered when the production environments likewise product mix and production quantity are changed. This paper introduces a simulation case study of a Korean company that produces packaging substrates(especially lead frames) and requires multi-objective decision support. $QUEST^{(R)}$ is used for simulation modelling and AHP(Analytic Hierarchy Process) and DEA(Data Envelopment Analysis) are used for weighting of qualitative performance measures and solving multiple-objective layout problem, respectively.

Development of Small-sized Ceramic VCXO using the PECL (PECL을 이용한 소형 세라믹 VCXO 개발)

  • Lee, Jae-Kyung;Yoon, Dal-Hwan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.2A
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    • pp.107-113
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    • 2005
  • In this paper, we have developed the miniature ceramic PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The ceramic SMD PECL VCXO designed by the inverted Mesa type HFF is operating at the 3.3 Voltage and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

Fabrication and Challenges of Cu-to-Cu Wafer Bonding

  • Kang, Sung-Geun;Lee, Ji-Eun;Kim, Eun-Sol;Lim, Na-Eun;Kim, Soo-Hyung;Kim, Sung-Dong;Kim, Sarah Eun-Kyung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.29-33
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    • 2012
  • The demand for 3D wafer level integration has been increasing significantly. Although many technical challenges of wafer stacking are still remaining, wafer stacking is a key technology for 3D integration due to a high volume manufacturing, smaller package size, low cost, and no need for known good die. Among several new process techniques Cu-to-Cu wafer bonding is the key process to be optimized for the high density and high performance IC manufacturing. In this study two main challenges for Cu-to-Cu wafer bonding were evaluated: misalignment and bond quality of bonded wafers. It is demonstrated that the misalignment in a bonded wafer was mainly due to a physical movement of spacer removal step and the bond quality was significantly dependent on Cu bump dishing and oxide erosion by Cu CMP.