• 제목/요약/키워드: I-MOS

검색결과 131건 처리시간 0.024초

금속-산화막-반도체(MOS) 소자에서의 전자주입에 따른 느린 준위의 전류 응답 특성 연구 (The Electron Injection-induced Slow Current Transients in Metal-Oxide-Semiconductor Capacitors)

  • 최성우;전현구;안병철;노관종;노용한
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.216-219
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    • 1999
  • A simple two-terminal cyclic current-voltage(I-V) technique is used to measure the current-transients in MOS capacitors. Distinct charging/discharging currents were measured and analyzed as a function of (1) the hold time. (2) the gate polarity during the FNT electron injection, (3) the injection fluence and (4) the annealing time after the injection had stopped. Discharging and charging current-transients were strongly dependent upon the conditions for forming the inversion layer and the density of interface traps caused during the FNT electron injection, respectively. Several tentative mechanisms were suggested in the current work.

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복합 BiCMOS 트랜지스터의 회로 분석 및 그로 구성된 차동 증폭기의 설계기법에 관한 연구 (A Study on the Circuit Analysis of Composite BiCMOS Transistor and the Design Methodology of BiCMOS Differential Amplifier)

  • 송민규;김민규;박성진;김원찬
    • 대한전자공학회논문지
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    • 제26권9호
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    • pp.1359-1368
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    • 1989
  • In this paper, the composite BiCMOS transistor which combines a bipolar transistor and a MOS transistor in a cascade type, is analyzed in terms of I-V characteristics and small signal equivalent circuit. As a result, it has a larger driving capability than MOS transistor and a more extended rante of input voltage than bipolar transistor. Next, a BiCMOS differential amplifier as its application example is designed and compared with the CMOS one and the bipolar one. It increases the driving capability of the CMOS differential amp and improves the linear operation region of the bipolar differential amp.

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PERFORMANCE EVALUATIONS OF ADVANCED GENERATION IGBTS AND MCT IN SINGLE-ENDED RESONANT INVERTER

  • Ishimaru, N.;Fujita, A.;Hirota, I.;Yamashita, H.;Omori, H.;Nakamizo, Tetsuo;Shirakawa, S.;Nakaoka, Mutsuo.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.851-854
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    • 1998
  • In recent years, a cost-effective voltage-source type single-ended resonant-load inverter using MOS gate power switching devices and its related resonant inverter topologies have been commonly used for induction-heated cooking appliances because of relatively-lowered switching losses, simple circuit topology, low cost, compactness and low harmonic current in utility AC side. This paper present some comparative performance evaluations of IGBTs as sample devices in each generation and MOS controlled Thyristor(MCT) incorporated into the voltage-source type single-ended load resonant inverter for induction-heating rice cookers used for consumer power electronic applications, in which the output power can be regulated on the basis of Frequency Modulation Scheme.

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전력 VDMOSFET의 2차원Computer Simulation (Two Dimensional Computer Simulation of Power VDMOSFET)

  • 박배웅;이우선
    • 대한전기학회논문지
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    • 제37권9호
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    • pp.609-618
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    • 1988
  • 본 논문에서는 전력 VDMOSFET를 2차원 수치해석하여 I_V특성을 구할 수 있는 computer program을 작성하였고 이 program에 의해서 전력 수직이중확산형 MOS(VDMOS)의 I-V 분포 특성, 전위 및 전자정공 농도 분포특성이 computer simulation되었다. 또 teansconductance, on-resistance 및 표면 이동도 model이 적용된 I_V특성이 simulation되어 실험값 및 선행연구자의 결과값과 비교되었다. 기본 방정식은 유한차등분법(F.D.M)에 의해서 해석되었고 Gummel이 알고리즘과 Mock의 식이 적용 되었다.

VoIP 손실 환경에 강인한 저지연 LSF FEC 기법 (Low-Delay LSF FEC Technique Robust in Lossy VoIP Environment)

  • 양해용;이경훈;황인호
    • 대한전자공학회논문지SP
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    • 제39권6호
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    • pp.687-695
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    • 2002
  • VoIP 음성 패킷 손실에 대한 대응 방안으로 제시되고 있는 매체 종속 FEC 기법은 통화 품질을 개선시키는 효과를 갖는데 반하여 한 프레임에 해당하는 추가지연이 발생하는 단점을 갖는다. 본 논문에서는 패킷 손실 복원에 사용되는 잉여 정보로 미래 프레임의 LSF 성분을 사용함으로써, 전송 지연을 줄이고 통화 품질을 개선할 수 있는 LSF FEC 기법을 제안하고 그 성능을 평가한다. 성능 평가를 위해서 VoIP에서 사용하는 ITU-T G.723.1, G.729 코덱을 Gilbert 손실 모델에 적용하고, PESQ 음질 측정 알고리즘을 사용하여 각 손실률 별로 MOS를 추정하는 방법을 사용한다. 본 논문에서 제안한 기법은 기존의 매체 종속 FEC 기법에 비해서 6.5ms∼27ms 이상의 지연 감소 효과를 가지고 있는 것으로 나타났으며, FEC를 적용하지 않은 경우와의 복원 음성 품질 비교 시뮬레이션 결과, 5% 정도의 현실적인 손실 환경에서 MOS 0.1 이상의 음질 개선 효과를 보였다.

Gate Tunneling Current and QuantumEffects in Deep Scaled MOSFETs

  • Choi, Chang-Hoon;Dutton, Robert W.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권1호
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    • pp.27-31
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    • 2004
  • Models and simulations of gate tunneling current for thinoxide MOSFETs and Double-Gate SOIs are discussed. A guideline in design of leaky MOS capacitors is proposed and resonant gate tunneling current in DG SOI simulated based on quantum-mechanicalmodels. Gate tunneling current in fully-depleted, double-gate SOI MOSFETs is characterized based on quantum-mechanical principles. The simulated $I_G-V_G$ of double-gate SOI has negative differential resistance like that of the resonant tunnel diodes.

LDD-nMOSFET의 핫 캐리어 열화 억제를 위한 표면 이온주입 효과에 대한 연구 (A study on Effect of Surface ion Implantation for Suppression of Hot carrier Degradation of LDD-nMOSFETs)

  • 서용진;안태현;김상용;김태형;김창일;장의구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부 C
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    • pp.735-736
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    • 1998
  • Reduction of hot carrier degradation in MOS devices has been one of the most serious concerns for MOS-ULSIs. In this paper, three types of LDD structure for suppression of hot carrier degradation, such as spacer-induced degradation and decrease of performance due to increase of series resistance will be investigated. LDD-nMOSFETs used in this study had three different drain structure. (1) conventional ${\underline{S}}urface$ type ${\underline{L}}DD$(SL), (2) ${\underline{B}}uried$ type ${\underline{L}}DD$(BL), (3) ${\underline{S}}urface$urface ${\underline{I}}mplantation$ type LDD(SI). As a result, the surface implantation type LDD structure showed that improved hot carrier lifetime to comparison with conventional surface and buried type LDD structure.

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비휘발성 메모리를 위한 $SiO_2/Si_3N_4$ 적층 구조를 갖는 터널링 절연막의 열처리 효과 (Annealing Effects of Tunneling Dielectrics Stacked $SiO_2/Si_3N_4$ Layers for Non-volatile Memory)

  • 김민수;정명호;김관수;박군호;정종완;정홍배;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.128-129
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    • 2008
  • The annealing effects of $SiO_2/Si_3N_4$ stacked tunneling dielectrics were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_3N_4/SiO_2/Si_3N_4$(NON), $SiO_2/Si_3N_4/SiO_2$(ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS(Metal-Oxide-Semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field and improved electrical characteristics by annealing processes than $SiO_2$ layer.

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심리 음향 켑스트럼 평균 차감법을 이용한 이동 전화망에서의 음질 평가 (Speech Quality Measure in a Mobile Communication System Using PLP Cepstral Distance with CMS)

  • 윤종진;박상욱;박영철;윤대희;차일환
    • 음성과학
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    • 제6권
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    • pp.163-179
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    • 1999
  • For the set up, management and repair of a mobile communication system, continuous estimation of speech quality is required. Speech quality measurement can be conducted by listener's judgement in a subjective test such as MOS (Mean Opinion Score) test. However, this method is laborious, expensive and time-consuming, it is advisable to predict subjective speech quality via objective measures. This paper presents a robust objective speech quality measure, PLP-CMS (Perceptual Linear Predictive-Cepstral Mean Subtraction), which can predict subjective speech quality in mobile communication systems. PLP-CMS has a high correlation with subjective quality owing to PLP (Perceptual Linear Predictive) analysis and shows a robust performance not being influenced by PSTN (Public Switched Telephone Network) channel effects due to CMS (Cepstral Mean Subtraction). To prove the performance of our proposed algorithm, we carried out subjective and objective quality estimation on speech samples which are variously distorted in a real mobile communication system. As a result, we demonstrated that PLP-CMS has a higher correlation with subjective quality than PSQM (Perceptual Speech Quality Measure) and PLP-CD (Perceptual Linear Predictive-Cepstral Distance).

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BcN용 미디어 프로세서형 단말(PMG)의 구현 및 성능시험 (Implementation and Performance Measurement of Personal Media Gateway for Applications over BcN Networks)

  • 장성환;양수경;차영철;최우석;손석배;김정준
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2005년도 하계학술대회
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    • pp.329-332
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    • 2005
  • In this paper, we describe implementation of personal media gateway (PMG) for applications over BcN networks. PMG is a TV based set-top terminal, which enables transmission of Full D1 high quality video and audio at the speed of maximum 2Mbps. It supports SIP protocol and QoS for the BcN networks. The hardware of the PMG consists of host module, audio/video codec processing module, DTMF module, and remote control I/O module. H.263 and MPEG4 software are implemented in DSP as codec for hi-directional communication and streaming, respectively. G.711 and Ogg-Vorbis are implemented as audio codec. We examined the quality of video using the Video Quality Test Equpment, which was developed by KT Convergence Lab. The experimental results show the video quality of MOS 4.1 and audio quality of MOS 4.3. We expect that PMG will be prospective business models, and create new customer value.

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