• Management Science and Financial Engineering
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• v.4 no.2
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• pp.43-58
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• 1998

Packet switch is a key component in high speed digital networks. This paper investigates congestion phenomena in the packet switching with input buffers. For large value of switch size N, mathematical models have been developed to analyze asymptotic maximum switch throughput under nonuniform traffic. Simulation study has also been done for small values of finite N. The rapid convergence of the switch performance with finite switch size to asymptotic solutions implies that asymptotic analytical solutions approximate very closely to maximum throughputs for reasonably large but finite N. Numerical examples show that non-uniformity in traffic pattern could result in serious degradation in packet switch performance, while the maximum switch throughput is 0.586 when the traffic load is uniform over the output trunks. Window scheduling policy seems to work only when the traffic is relatively uniformly distributed. As traffic non-uniformity increases, the effect of window size on throughput is getting mediocre.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1978-1979
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• 2007

In this paper, the authors introduce a high-speed microprocessor based on automatic vacuum capacitor switch with a modified digital filter design using distributed arithmetic. The automation trends particularly the automatic vacuum capacitor switch has helped ameliorate the power factor essentials and automatically triggered to close when the line current exceeds rated value. Microprocessor relays use digital filters to extract only the fundamental and attenuate harmonics. To provide optimum speed characteristics a distributed arithmetic based filter design in the microprocessor controller which not only enhances filtering speed but additionally enables lower power consumption at the cost of area has been introduced. The result is a unified description that describes a digital filter structure down to bit level.

• Journal of Power Electronics
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• v.16 no.2
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• pp.786-797
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• 2016

This paper describes the design and development of a novel semiconductor-based solid-state switch for damped oscillating voltage test system. The proposed switch is configured as two identical series-connected switch stacks, each of which comprising 10 series-connected IGBT function units. Each unit consists of one IGBT, a gate driver, and an auxiliary voltage sharing circuit. A single switch stack can block 20 kV-rated high voltage, and two stacks in series are proven applicable to 30 kV-rated high voltage. The turn-on speed of the switch is approximately 250 ns. A flyback topology-based power supply system with a front-end power factor correction is built for the drive circuit by loosely inductively coupling each unit with a ferrite core to the primary side of a power generator to obtain the advantages of galvanic isolation and compact size. After the simulation, measurement, and estimation of the parasitic effect on the gate driver, a prototype is assembled and tested under different operating regimes. Experimental results are presented to demonstrate the performance of the developed prototype.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.915-916
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• 2007

There are many equipments for the Short Circuit Test, for example Short Circuit Generator, Induction Motor, Sequence Timer, Exciter, CLR, Back Up Breaker, Making Switch and TRV etc. Especially Back up Breaker and Making Switch are very important equipments to test the short circuit test. A role of a Back up Breaker is to break high-voltage and high-current for short circuit test and a Making Switch should be operated always same speed/time and kept electrical-mechanical characteristics to make the voltage and current of short circuit test. This study introduces to the short circuit test also to kinds, principal movements and compare them of Back up Breaker and Making Switch.

• Korean Journal of Materials Research
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• v.12 no.4
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• pp.254-258
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• 2002

To realize channel cross-connecting in optical communications systems, a high speed optical matrix switch was fabricated using z-cut $LiNbO_3$. For switch fabrication was design bending structure and coupling length and four $2{\times}2$ directional couplers were integrated on one substrate far construction of a $4{\times}4$ switch. Single-mode optical waveguides were formed by Ti-diffusion at a wet $O_2$ atmosphere. Ti-diffusion profile, refractive index variation and waveguide morphology were analyzed by Prism coupler and optical microscopy, respectively.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.181-187
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• 2003

In high speed packet switching network, packet service by priority scheme prefer to QoS. Efficient packet service according to the priority scheme in high speed packet switch is a key point. Therefore development of priority service algorithm in the packet switch is very important. In this paper, we proposed W-iSLIP algorithm that service time take queue length into consideration and compared the proposed W-iSLIP algorithm to other previous proposed algorithm through simulation. Simulation results show 2.6% performance elevation in average delay, and 34.6% performance elevation in priority service.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.394-397
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• 2003

In this paper, we describe the implementation of high performance buffer manager that is used in an advanced input-queued switch fabric. The designed buffer manager provides wire-speed cell/packet routing with low cost and tolerates the transmission pipeline latency of request and grant data. The buffer manager is implemented in a FPGA chip and supports the speed of OC-48c, 2.5Gbps per port.

• Journal of Power Electronics
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• v.12 no.1
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• pp.75-82
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• 2012

Elimination of rotor position sensors mechanically coupled with the rotor shaft is attractive to variable speed drives primarily due to increased system reliability and cost reduction. In this regard, search for a simple and robust position sensorless control has been intensified in past few years specifically for low-cost, high-volume applications such as home appliances. This paper describes a new parameter insensitive position sensorless control for switched reluctance motor (SRM) drives satisfying such a need in this market segment. Two consecutive switch-on times of the controllable switch in hysteresis current control are compared to estimate the rotor position and speed. The proposed sensorless control algorithm is very simple to implement since it does not depend on extensive computation or any additional hardware. In addition, the proposed method is robust in that its dynamic performance is least affected by system parameter variations. The proposed approach is demonstrated on a single-controllable-switch-converter-driven SRM with two-phases that lends itself to a system with low cost and compact packaging which comes close to the intended applications. Analysis and simulation results followed by experimental verification are presented to demonstrate the feasibility of the proposed sensorless control method.

• Journal of the Korean Society for Railway
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• v.10 no.6
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• pp.735-741
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• 2007

A turnout system which permits trains to pass from one track to another is a combination of the switch, the crossing, lead rails which are necessary to connect the switch and the crossing, two guard rails and a switch machine for operating the switch. In Korea, it has been planned to adopt the high speed tilting train which is suitable for the circumstance of Korea and operates at the maximum speed of 180 km/h, at conventional lines by the year of 2010. For the present, the prototype of the tilting train has been fabricated, and has undergoing a trial run. In this study, evaluation of noise around the turnout system induced by the tilting train has been implemented through the field measurements.

• ETRI Journal
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• v.31 no.3
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• pp.342-344
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• 2009

From a hydrodynamic device simulation for the pseudomorphic high electron mobility transistors (pHEMTs), we observe an increase of maximum extrinsic transconductance and a decrease of source-drain capacitances. This gives rise to an enhancement of the switching speed and isolation characteristics as the upper-to-lower planar-doping ratios (UTLPDR) increase. On the basis of simulation results, we fabricate single-pole-double-throw transmitter/receiver monolithic microwave integrated circuit (MMIC) switches with the pHEMTs of two different UTLPDRs (4:1 and 1:2). The MMIC switch with a 4:1 UTLPDR shows about 2.9 dB higher isolation and approximately 2.5 times faster switching speed than those with a 1:2 UTLPDR.