• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.6
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• pp.9-13
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• 2019

In this study, a miniature thin film-patterned heater was fabricated on a silicon substrate using semiconductor process technology and the thermal characteristics of the applied voltage, power, and temperature of the thin film heater were measured and analyzed. The temperature of the thin film pattern heater increased with increasing power, but the temperature increase rate was gradual at high power intervals. The characteristics of the high temperature section of the platinum thin film-patterned heater were analyzed using the heat resistance model under atmospheric and vacuum conditions. The thermal resistance measured in a vacuum atmosphere was 0.79 [K/mW] higher than the heat resistance value 0.69 [K/mW] in air. The temperature of the thin film pattern heater can be maintained at a low power in a vacuum rather than in air, and these results are expected to be utilized in the structural design of a thin film-patterned heater element.

• Nuclear Engineering and Technology
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• v.48 no.1
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• pp.211-217
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• 2016

Most nuclear power plants now utilize solid grounded low voltage systems. For safety and reliability reasons, the low voltage (LV) high resistance grounding (HRG) system is also increasingly used in the pulp and paper, petroleum and chemical, and semiconductor industries. Fault detection is easiest and fastest with a solidly grounded system. However, a solidly grounded system has many limitations such as severe fault damage, poor reliability on essential circuits, and electrical noise caused by the high magnitude of ground fault currents. This paper will briefly address the strengths and weaknesses of LV grounding systems. An example of a low voltage HRG system in the LV system of a nuclear power plant will be presented. The HRG system is highly recommended for LV systems of nuclear power plants if sufficient considerations are provided to prevent nuisance tripping of ground fault relays and to avoid the deterioration of system reliability.

• 한국컴퓨터산업교육학회:학술대회논문집
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• 2003.11a
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• pp.95-98
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• 2003

Power semiconductors are being currently used as a application of intelligent power inverters to a refrigerator, a washing machine and a vacuum cleaner as well as core parts of industrial system. The rating of semiconductor devices is an important factor in decision on the field of application and the forward blocking voltage is one of factors in decision of the rating. The Power MOS device has a merit of high input impedance, short switching time, and stability in temperature as well known. Power MOS devices are mainly used as switches in the field of power electronics, especially the on-state resistance and breakdown voltage are regarded as the most important parameters. Power MOS devices that enable a small size, a light weight, high-integration and relatively high voltage are required these days. In this paper, we proposed the new lateral power MOS which has forward blocking voltage of 250V and contains trench electrodes and verified manufactural possibility by using TSUPREM-4 that is process simulator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.101-102
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• 2005

SiC lateral power semiconductor device has high breakdown voltage and low on-state voltage drop due to the material characteristics. And, because the high breakdown voltage can be obtained, RESURF technique is mostly used in silicon power semiconductor devices. In this paper, we presents the electrical characteristics of the 4H-SiC RESURF LDMOSFET as a function of the epi-layer length, concentration and thickness. 240~780V of breakdown voltage can be obtained as a function of epi-layer length and thickness with same epi-layer concentration.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.341-346
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• 2017

In this paper, we present a 60 GHz on-off keying (OOK) modulator in a 90 nm CMOS. The modulator employs a current-reuse technique and a switching modulation for low DC power dissipation, high on/off isolation, and high data rate. The measured gain of the modulator, on/off isolation, and output 1-dB compression point is 9.1 dB, 24.3 dB, and 5.1 dBm, respectively, at 60 GHz. The modulator consumes power consumption of 18 mW, and is capable of handling data rates of 8 Gb/s at bit error rate of less than $10^{-6}$ for $231^{-1}$ PRBS over a distance of 10-cm with an OOK receiver module.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.9
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• pp.33-39
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• 2012

For photovoltaic power generation need certainly decreasing module's price and increasing promote efficiency technology. Almost of solar panel is on the decrease energy efficiency since 2,000. like silicone(Si) solar panel, thin film solar panel and etc. Silicone(Si) solar panel was best efficiency in 1999. It's 24%. But after that time, It didn't pass limit of energy efficiency. That's why, nowadays being issued that using III-V compound semiconductor to high efficiency of concentrating photovoltaic system for making an alternative proposal. In Korea, making researches in allied technology with III-V compound semiconductor solar panel, condenser technology, and solar tracker. but feasibility study for concentrating photovoltaic power generation hasn't progressed yet. This thesis made a plan about CPV(Concentrating Photovoltaic)system and CPV has a higher energy efficiency than PV(Photovoltaic)system in fine climate conditions from comparing CPV with using silicone(Si) solar panel to PV's efficiency test result.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.693-696
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• 2004

For InGaP/GaAs HBT applications, we have developed characterized MIM capacitors with thin $1000{\AA}$ PECVD silicon nitride which were deposited with $SiH_4/NH_3$ gas mixing rate, working pressure, and RF power of PECVD at $300^{\circ}C$ and had the capacitance density of 600 pF/$mm^2$ with the breakdown electric fields of 3073 MV/cm. Three PECVD process parameters were designed to lower the refractive index and then lower the deposition rate of silicon nitride films for the high breakdown electric field. At the PECVD process condition of gas mixing rate (0.92), working pressure (1.3 Torr), RF power (53 W), the AFM Rms value of about $1000{\AA}$ silicon nitride on the bottom metal was the lowest of 0.662 nmand breakdown electric fields were the highest of about 73 MV/cm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.252-255
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• 2004

반도체는 high integrated, high speed, low power를 위하여 design 뿐만 아니라 재료 측면에서도 많은 변화를 가져오고 있으며, RC delay time을 줄이기 위하여 Al 배선보다 비저항이 낮은 Cu와 low-k material 적용이 그 대표적인 예이다. 그러나, Cu 배선의 경우 dry etching이 어려우므로, 기존의 공정으로는 그 한계를 가지므로 damascene 또는 dual damascene 공정이 소개, 적용되고 있다. Damascene 공정은 절연막에 photo와 RIE 공정을 이용하여 trench를 형성시킨 후 electrochemical plating 공정을 이용하여 trench에 Cu를 filling 시킨다. 이후 CMP 공정을 이용하여 절연막 위의 Cu와 barrier material을 제거함으로서 Cu 배선을 형성하게 된다. Dual damascene 공정은 trench와 via를 동시에 형성시키는 기술로 현재 대부분의 Cu 배선 공정에 적용되고 있다. Cu CMP는 기존의 metal CMP와 마찬가지로 oxidizer를 이용한 Cu film의 화학반응과 연마 입자의 기계가공이 기본 메커니즘이다. Cu CMP에서 backside pressure 영향이 uniformity에 미치는 영향을 살펴보았으며, electrochemical plating 공정에서 발생하는 hump가 CMP 결과에 미치는 영향과 dishing 결과를 통하여 그 영향을 평가하였다.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.20-23
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• 2010

The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

• Journal of the Korean Physical Society
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• v.73 no.9
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• pp.1356-1361
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• 2018

Replacing conventional Si diodes with SiC diodes in Si insulated gate bipolar transistor (IGBT) modules is advantageous as it can reduce power losses significantly. Also, the fast switching nature of the SiC diode will allow Si IGBTs to operate at their full high-switching-speed potential, which at present conventional Si diodes cannot do. In this work, the electrical test results for Si-IGBT/4HSiC-Schottky hybrid substrates (hybrid SiC substrates) are presented. These substrates are built for two voltage ratings, 1.7 kV and 3.3 kV. Comparisons of the 1.7 kV and the 3.3 kV Si-IGBT/Si-diode substrates (Si substrates) at room temperature ($20^{\circ}C$, RT) and high temperature ($H125^{\circ}C$, HT) have shown that the switching losses in hybrid SiC substrates are miniscule as compared to those in Si substrates but necessary steps are required to mitigate the ringing observed in the current waveforms. Also, the effect of design variations on the electrical performance of 1.7 kV, 50 A diodes is reported here. These variations are made in the active and termination regions of the device.