• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.134-142
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• 2010

A comparative study on the trade-off between the drive current and the total gate capacitance in double-gate (DG) and triple-gate (TG) FinFETs is performed by using 3-D device simulation. As the first result, we found that the optimum ratio of the hardmask oxide thickness ($T_{mask}$) to the sidewall oxide thickness ($T_{ox}$) is $T_{mask}/T_{ox}$=10/2 nm for the minimum logic delay ($\tau$) while $T_{mask}/T_{ox}$=5/1~2 nm for the maximum intrinsic gate capacitance coupling ratio (ICR) with the fixed channel length ($L_G$) and the fin width ($W_{fin}$) under the short channel effect criterion. It means that the TG FinFET is not under the optimal condition in terms of the circuit performance. Second, under optimized $T_{mask}/T_{ox}$, the propagation delay ($\tau$) decreases with the increasing fin height $H_{fin}$. It means that the FinFET-based logic circuit operation goes into the drive current-dominant regime rather than the input gate load capacitance-dominant regime as $H_{fin}$ increases. In the end, the sensitivity of $\Delta\tau/{\Delta}H_{fin}$ or ${{\Delta}I_{ON}}'/{\Delta}H_{fin}$ decreases as $L_G/W_{fin}$ is scaled-down. However, $W_{fin}$ should be carefully designed especially in circuits that are strongly influenced by the self-capacitance or a physical layout because the scaling of $W_{fin}$ is followed by the increase of the self-capacitance portion in the total load capacitance.

• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.346-349
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• 1996

In application of high power IGBT PWM inverters, the treatable power range is considerably limited due to the overvoltage caused by the stray inductance components within the power circuit. This paper proposes a new gate drive circuit for IGBTs which can actively suppress the overvoltage across the driven IGBT at turn-off and the overvoltage across the opposite IGBT at turn-on while preserving the most simple and reliable power circuit. The turn-off driving scheme has adaptive feature to the amplitude of collector current, so that the overvoltage is limited much effectively at the larger collector current. The turn-on scheme is to decrease the rising rate of the collector current by increasing input capacitance during turn-on transient when the gate-emitter voltage is greater than threshold voltage. The experimental results under various normal and fault conditions prove the effectiveness of the proposed circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.96-102
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• 2009

This paper deals with gate drive and power IC for high power devices(600V/200A and 1200V/150A). The proposed gate driver provides high gate driving capability (4 A source, 8 A sink), and over-current protected by means of power transistor desaturation detection. In addition, soft-shutdown function is added to reduce voltage overshoots due to parasitic inductance. This gate drive If is designed, fabricated, and tested using the Dongbu hitek 0.35um BCDMOS process.

• International journal of advanced smart convergence
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• v.12 no.4
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• pp.1-7
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• 2023

Large-size, organic light-emitting device (OLED) panels based on highly reliable gate driver circuits integrated using InGaZnO thin film transistors (TFTs) were developed to achieve ultra-high resolution TVs. These large-size OLED panels were driven by using a novel gate driver circuit not only for displaying images but also for sensing TFT characteristics for external compensation. Regardless of the negative threshold voltage of the TFTs, the proposed gate driver circuit in OLED panels functioned precisely, resulting from a decrease in the leakage current. The falling time of the circuit is approximately 0.9 ㎲, which is fast enough to drive 8K resolution OLED displays at 120 Hz. 120 Hz is most commonly used as the operating voltage because images consisting of 120 frames per second can be quickly shown on the display panel without any image sticking. The reliability tests showed that the lifetime of the proposed integrated gate driver is at least 100,000 h.

• Journal of the Korea Society for Simulation
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• v.4 no.2
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• pp.41-60
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• 1995

The IGBT(Insulated Gate Bipolar Transistor) is a power semiconductor device that has gained acceptance among circuit design engineers for motor drive and power converter applications. IGBT devices(International Rectifier, Proposed proposed model etc) have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirememts and high current density capability. When designing circuit and systems that utilize IGBTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The interaction of the IGBT with the load circuit can be described using the device model and the state equation of the load circuit. The voltage rise rate at turn-off for inductive loads varies significantly for IGBTs with different base life times, and this rate of rise is important in determing the voltage overshoot for a given series resistor-inductor load circuit. Excessive voltage overshoot is potentially destructive, so a snubber protection circuit may be required. The protection circuit requirements are unique for the IGBT and can be examined using the model. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.323-327
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• 1998

Under high power IGBTs Switching, a large overvoltage is induced across the IGBT module due to the stray inductance in the circuit. This paper proposes a new gate drive circuit for high power IGBTs which can actively suppress the overvoltage across the driven IGBT at turn-off while preserving the most simple and reliable power circuit. The turn-off driving scheme has adaptive feature to the amplitude of collector current, so that the overvoltage can be limited much effectively at the fault collector current. Experimental results under various normal and fault conditions prove the effectiveness of the proposed.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2213-2216
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• 1997

Efficient Switching of IGBT's requires fast gate drivers with high peak currents. This Paper will review the requirements for effient, reliable gate drive of IGBT's and behaviour of an IGBT switching chacteristcs. The purpose of the present paper is to investigate the switching loss mechanisms in IGBT such as MOSFETs in order to give a support to designers of IGBT gate drive circuits in selecting the more appropriate IGBTs to be used on the basics of design repuirements.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.2
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• pp.135-144
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• 2008

A bootstrap circuit is widely used for the floating gate power supply of Intelligent power module (IPM). A bootstrap circuit is simple and inexpensive. However, the duty cycle and on-time are limited by the requirement to refresh the charge in the bootstrap capacitor. And the value of the bootstrap capacitor should be increased as the switching frequency decreases. A charge pump circuit can be used to overcome the problems. This paper deals with an analysis and design of a charge pump circuit for the floating gate power supply of an IPM. The simulation and experiment are carried out for an induction motor drive system. The results well verifies the validity of the proposed circuit and design method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.58-65
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• 2009

In this paper, we designed high voltage gate drive IC including dead time circuit in which capacitors controlled rising time and falling time, and schimitt-triggers controlled switching voltage. Designed High voltage gate drive IC improves an efficiency of half-bridge converter by decreasing dead time variation against temperature and has variable dead time by the capacitor value. and its power dissipation, which is generated on high side part level shifter, has decreased 52 percent by short pulse generation circuit, and UVLO circuit is designed to prevent false-operation. We simulated by using Spectre of Cadence to verify the proposed circuit and fabricated in a 1.0um process.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.237-239
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• 1994

The MOS-controlled thyristor(MCT) is a new power semi-conductor device that combines four layers thyristor structure presenting regenerative action and MOS-gate providing controlled turn-on and turn-off. The MCT has very fast switching speed owing to voltage controlled MOS-gate, and very low on-state voltage drop resulting from regenerative action of four layers thyristor structure. In addition, because of a higher dv/dt rating and di/dt rating, gate drive circuit and snubber circuit can be simpler comparing to other power switching devices. So recently much interest and endeavor is being applied to develop the performance and ratings of the MCT. This paper describes the switching characteristic of the MCT for its practical applications and presents a model for PSPICE circuit simulation. The model for PSPICE circuit simulation is compared to the experimental result using MCTV75P60F1 made by Harris co..