• 제목/요약/키워드: GaAs FET

검색결과 124건 처리시간 0.023초

An MMIC VCO Design and Fabrication for PCS Applications

  • Kim, Young-Gi;Park, Jin-Ho
    • Journal of Electrical Engineering and information Science
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    • 제2권6호
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    • pp.202-207
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    • 1997
  • Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.

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SART용 X-밴드 전력증폭기의 설계와 제작에 관한 연구 (A Study on the Design and Fabrication of X-band Power Amplifier for SART)

  • 김철수;김미숙;최병하
    • 한국항해학회지
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    • 제23권3호
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    • pp.29-34
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    • 1999
  • In this paper, an X-band power amplifier using GaAs FET was designed and fabricated, which is to be used as SART transmitter sweeping at the frequency range of 9.2 GHz~9.5 GHz. The amplifier is consist of two stages using ATF-46101 FET of Hewllett-Packard. Finally, the amplifier using microstrip line matching solution shows that MAG is 23 dB at the center frequency of 9.35 GHz.

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이종접합 Gate 구조를 갖는 수평형 NiO/Ga2O3 FET의 전기적 특성 연구 (Electrical Characterization of Lateral NiO/Ga2O3 FETs with Heterojunction Gate Structure)

  • 이건희;문수영;이형진;신명철;김예진;전가연;오종민;신원호;김민경;박철환;구상모
    • 한국전기전자재료학회논문지
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    • 제36권4호
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    • pp.413-417
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    • 2023
  • Gallium Oxide (Ga2O3) is preferred as a material for next generation power semiconductors. The Ga2O3 should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga2O3 is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu2O. Research the lateral-type FET structure of NiO/Ga2O3 heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1×1017 to 1×1019 cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at ID = 1×10-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga2O3 region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at ID =1×10-3 A/mm.

ISM 대역용 고출력 전력증폭기의 설계 몇 구현 (A Design and Implementation of High Power Amplifier for ISM-band)

  • 최성건;박준석;이문규;천창율
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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    • pp.326-329
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    • 2003
  • In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

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소스 피드백을 이용한 무선랜용 이중대역 저잡음 증폭기 설계 (Design of Dual Band LNA for Wireless LAN Using Source Feedback)

  • 전현진;최금성;구경헌
    • 대한전자공학회논문지TC
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    • 제44권7호통권361호
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    • pp.23-28
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    • 2007
  • 본 논문에서는 무선 랜용 이중대역 GaAs FET 저잡음 증폭기를 설계하기 위하여 인덕턴스 소스 피드백을 이용하고 입력 단에는 이중대역 LC 공진회로를 이용하였으며, 출력단에는 Cheyshev 필터의 임피던스 변환 회로를 이용하였다. 이중대역 증폭기의 입출력정합회로 설계에 필요한 기법 및 수식들을 유도하였으며 설계된 증폭기를 제작하여 측정한 결과 시뮬레이션 결과와 유사한 측정치를 얻을 수 있었다.

DC voltage control by drive signal pulse-width control of full-bridged inverter

  • Ishikawa, Junichi;Suzuki, Taiju;Ikeda, Hiroaki;Mizutani, Yoko;Yoshida, Hirofumi
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1996년도 Proceedings of the Korea Automatic Control Conference, 11th (KACC); Pohang, Korea; 24-26 Oct. 1996
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    • pp.255-258
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    • 1996
  • This paper describes a DC voltage controller for the DC power supply which is constructed using the full-bridged MOS-FET DC-to-RF power inverter and rectifier. The full-bridged MOS-FET DC-to-RF inverter consisting of four MOSFET arrays and an output power transformer has a control function which is able to control the RF output power when the widths of the pulse voltages which are fed to four MOS-FET arrays of the fall-bridged inverter are changed using the pulse width control circuit. The power conversion efficiency of the full-bridged MOS-FET DC-to-RF power inverter was approximately 85 % when the duty cycles of the pulse voltages were changed from 30 % to 50 %. The RF output voltage from the full-bridged MOS-FET DC-to-RF inverter is fed to the rectifier circuit through the output transformer. The rectifier circuit consists of GaAs schottky diodes and filters, each of which is made of a coil and capacitors. The power conversion efficiency of the rectifier circuit was over 80 % when the duty cycles of the pulse voltages were changed from 30 % to 50 %. The output voltage of the rectifier circuit was changed from 34.7V to 37.6 V when the duty cycles of the pulse voltages were changed from 30 % to 50 %.

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가변 소스 인덕터를 갖는 GaAs FET 선형화기 설계 (Design of GaAs FET Linearizer with Variable Source Inductance)

  • 안정식;이기홍;강정진;유재문;이종악
    • 전기전자학회논문지
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    • 제3권2호
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    • pp.221-225
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    • 1999
  • 본 논문에서는 소스에 큰 값의 가변 인덕터를 갖는 새로운 형태의 predistortion 선형화기가 연구되었다. 그것은 입력 전력이 증가함에 따라 양의 진폭과 음의 위상 편차를 얻을 수 있어 전력증폭기에서 만들어지는 왜곡을 충분히 보상할 수 있다. 또한, 하나의 CaAs FET, 인덕터, 입 출력 정합회로, 그리고 바이어스회로로 구성되어, 회로가 간단하므로 넓은 대역폭에 걸쳐 선형화 특성과 온도 안정성을 갖는다. 그리고 소스 인덕터와 게이트 바이어스를 변화시킴으로써 원하는 왜곡 특성을 얻을 수 있는 장점을 갖는다. 제작한 predistorter에서, 주 증폭기에 의한 IM3가 10.61dBc이고, predistorter를 갖는 주 증폭기의 IM3가 21.91dBc이므로 약 11dB의 개선된 결과를 얻었다.

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5.8GHz 무선 랜용 서브 하모닉 저항성 혼합기의 설계 (Design of 5.8 GHz Wireless LAN Sub Harmonic Pumped Resistive Mixer)

  • 유홍길;김완식;강정진;이종악
    • 전기전자학회논문지
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    • 제8권1호
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    • pp.73-78
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    • 2004
  • 본 논문은 5.8 GHz 무선 랜용 서브 하모닉 저항성 혼합기를 설계하였다. 서브 하모닉 저항성 혼합기는 서브 하모닉 혼합기와 저항성 혼합기의 장점이 합쳐진 구조이다. 서브 하모닉 저항성 혼합기는 LO의 고조파 성분과 RF를 혼합하여 IF주파수를 얻는다. 그래서 기존의 혼합기보다 낮은 LO 주파수를 사용이 가능하다. 그리고 서브 하모닉 저항성 혼합기는 GaAs FET의 unbiased 채널 저항을 사용하여 주파수 혼합하므로 낮은 IMD를 특성을 갖는다. 제작된 서브 하모닉 저항성 혼합기의 변환손실은 LO 신호전력이 13 dBm일 때, 10.67 dB이다. 그리고 혼합기의 IIP3는 21.5 dBm이다.

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