• Title/Summary/Keyword: Frequency Synchronization

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Real-time Synchronization Algorithm for Industrial Hybrid Networks: CAN and Sensor Networks (공장 자동화용 혼합형 네트워크를 위한 실시간 동기화 알고리즘의 성능 분석: CAN과 센서 네트워크)

  • Jung, Ji-Won;Kim, Dong-Sung
    • Journal of Institute of Control, Robotics and Systems
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    • v.16 no.2
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    • pp.194-201
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    • 2010
  • This paper discuss a performance evaluation of the synchronization algorithm for hybrid networks in industrial environments. The proposed algorithms minimizes synchronization errors which were caused from channel, Propagation, and frequency delays. The modified RBS and offset synchronization methods can be operated by adjustment parameters. The differential BP (Back-off Period) adjustment can synchronize the local time of each node with master node's time in hybrid networks. For the performance analysis, the data transmission time between the wired and wireless devices are investigated. The experimental results show the performance evaluations in terms of the polling service time and an average end-to-end delay.

An Implementation Method of Frequency Offset Synchronization Using Compact CORDIC for OFDM Systems (OFDM 시스템에서 Compact CORDIC을 이용한 주파수 오프셋 동기화 구현 기법)

  • Lee Kyu-In;Yu Sung-Wook;Kim Jong-Han;Lee Jae-Kon;Cho Yong-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.7C
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    • pp.706-712
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    • 2006
  • In this letter, we propose a compact CORDIC processor for implementation of carrier frequency synchronization block in an OFDM (Orthogonal Frequency Division Multiplexing) system. The compact CORDIC processor is proposed by using inherenct properties of an OFDM system for estimation and compensation of carrier frequency offset, and is composed of a compact CORDIC preprocessor and a compact CORDIC processor. The compact CORDIC preprocessor plays a role of normalizing input signal efficiently, and the compact CORDIC processor is proposed to perform the vectoring mode and rotational mode jointly in CORDIC operation for carrier frequency synchronization. It is shown by FPGA implementation that the proposed compact CORDIC processor can achieve better performance with a significantly reduced hardware complexity than the conventional CORDIC approach.

Performance Analysis of Frequency Synchronization for HDR-WPAN System (HDR-WPAN 시스템을 위한 주파수 동기 성능분석)

  • Park, Ji-Woo;Kang, Hee-Gok;Kim, Jae-Young;Oh, Chang-Heon
    • Journal of Advanced Navigation Technology
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    • v.8 no.2
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    • pp.163-168
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    • 2004
  • In this paper, we propose a frequency synchronization algorithm using characteristic of CAZAC sequence for HDR-WPAN and analyze the performance by signal constellation and EVM(error vector magnitude). The proposed frequency offset technique estimated each sample phase error of two sequences among 12 CAZAC sequences which have excellent autocorrelated characteristic. Estimated phase error is multiplied to each sample of next sequence for compensating the frequency offset. The remaining frequency offset after compensating it with two sequences has maximum 0.002 offsest ranges at each sample. The computer simulation proved that the permission of EVM value had satisfied in the case of DQPSK at 20[dB].

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Design and Performance Comparison of Synchronization Preambles for Device-to-Device Communications (단말 간 직접 통신을 위한 효율적인 동기 프리앰블 설계 및 성능비교)

  • Kim, Jong-Hoon;Sung, Ki-Young;Jung, Young-Ho
    • Journal of Satellite, Information and Communications
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    • v.12 no.1
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    • pp.125-131
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    • 2017
  • In this paper, an efficient structure of device-to-device (D2D) synchronization preamble is proposed to meet the enhanced time and frequency synchronization requirements for D2D communication. D2D communication can be applied not only for the cellular communications, but also unmaned aerial vehicle communications and vehicle-to vehicle communication. The proposed preamble structure is transmitting signals at every odd subcarriers, and empty the other subcarriers to minimize the effect of inter-carrier interference. According to the simulation results, the proposed preamble structure provides improved time offset estimation performance, without degrading frequency offset estimation performance compared to the current LTE D2D preamble.

Algorithm for the Improvement of Time and Frequency Synchronization Performance in OFDMA System (OFDMA 시스템의 시간 및 주파수 동기 성능 향상을 위한 동기화 알고리즘)

  • Noh Jung-Ho;Sun Tae-Hyoung;Chang Kyung-Hi
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.4A
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    • pp.402-411
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    • 2006
  • In OFDMA system, multiple users transmit signal through the subcarriers assigned to the user. Capabilities of high data-rate transmission in OFDMA system come from the ability to compensate the ICI (Inter Carrier Interference) using a single-tap equalizer and to implement transmitter and receiver by employing high speed FFT circuitry. Issues of time and frequency synchronization in OFDM system is quite essential to preserve the orthogonality among subcarriers not to produce ICI. In this paper, we Int analyze the preamble used in 802.16 d/e and WiBro system. Then we propose an effective timing synchronization algorithm, which is more accurate than the conventional one in the sense of timing position, and integral frequency offset estimation scheme for the simultaneouse estimation of the fractional and integral frequency offset. Through the simulation utilizing the proposed synchronization algorithm and structure, we show that the performance degradation due to the adjacent channel interference can be mitigated for the than conventional ones.

Synchronization performance optimization using adaptive bandwidth filter and average power controller over DTV system (DTV시스템에서 평균 파워 조절기와 추정 옵셋 변화율에 따른 대역폭 조절 필터를 이용한 동기 성능 최적화)

  • Nam, Wan-Ju;Lee, Sung-Jun;Sohn, Sung-Hwan;Kim, Jae-Moung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.5
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    • pp.45-53
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    • 2007
  • To recover transmitted signal perfectly at DTV receiver, we have to acquire carrier frequency synchronization to compensate pilot signal which located in wrong position and rotated phase. Also, we need a symbol timing synchronization to compensate sampling timing error. Conventionally, to synchronize symbol timing, we use Gardner's scheme which used in multi-level signal. Gardner's scheme is well known for its sampling the timing error signal from every symbol and it makes easy to detect and keep timing sync in multi-path channel. In this paper, to discuss the problem when the received power level is out of range and we cannot get synchronization information. With this problem, we use 2 step procedures. First, we put a received signal power compensation block before Garder's timing error detector. Second, adaptive loop filter to get a fast synchronization information and averaging loop filter's output value to reduce the amount of jitter after synchronization in PLL(Phased Locked Loop) circuit which is used to get a carrier frequency synchronization and symbol timing synchronization. Using the averaging value, we can estimate offset. Based on offset changing ratio, we can adapt adaptive loop filter to carrier frequency and symbol timing synchronization circuit.

Outlier Detection Method for Time Synchronization

  • Lee, Young Kyu;Yang, Sung-hoon;Lee, Ho Seong;Lee, Jong Koo;Lee, Joon Hyo;Hwang, Sang-wook
    • Journal of Positioning, Navigation, and Timing
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    • v.9 no.4
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    • pp.397-403
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    • 2020
  • In order to synchronize a remote system time to the reference time like Coordinated Universal Time (UTC), it is required to compare the time difference between the two clocks. The time comparison data may have some outliers and the time synchronization performance can be significantly degraded if the outliers are not removed. Therefore, it is required to employ an effective outlier detection algorithm for keeping high accurate system time. In this paper, an outlier detection method is presented for the time difference data of GNSS time transfer receivers. The time difference data between the system time and the GNSS usually have slopes because the remote system clock is under free running until synchronized to the reference clock time. For investigating the outlier detection performance of the proposed algorithm, simulations are performed by using the time difference data of a GNSS time transfer receiver corrected to a free running Cesium clock with intentionally inserted outliers. From the simulation, it is investigated that the proposed algorithm can effectively detect the inserted outliers while conventional methods such as modified Z-score and adjusted boxplot cannot. Furthermore, it is also observed that the synchronization performance can be degraded to more than 15% with 20 outliers compared to that of original data without outliers.

Performance Analysis of an Efficient Frame Synchronization Scheme using FFT Window Position Restoration Algorithm for OFDM Systems (OFDM System에서 FFT 윈도우 위치 복원 알고리즘을 이용한 효율적인 프레임 동기방식의 성능분석)

  • Kim, Dong Ok;Yoon, Chong Ho
    • Journal of Advanced Navigation Technology
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    • v.5 no.1
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    • pp.45-53
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    • 2001
  • We present the frame synchronization scheme using the FFT window position restoration algorithm appropriate for wireless OFDM systems under multipath fading environment. From the restoration of the synchronization parameters of previous several frames, the algorithm can extract the synchronization parameters for the next frames. To analyze the performance of the proposed algorithm, we compare the probability of synchronization failure under time and frequency domains, respectively. From the simulation results, one can see that the algorithm in the time domain shows better performance than in the frequency one, for the $E_b/N_o$ of 6.0dB or more.

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Design of Doppler-Frequency Tracking System based on the Optimum Synchronization Techniques for the Digital Satellite Communication System (최적 동기방식에 의한 디지틀 위성통신 시스템의 도플러 위상 추적 장치 설계)

  • 최재익;박진우
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.12
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    • pp.2498-2507
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    • 1994
  • This paper proposes the Doppler frequency tracking system by the optimum synchronization technique which compensates the frequency shifts caused by satellite movement in a coherent digital satellite communication system. A Doppler frequency shift caused by satellite movements and the design theories of the optimum synchronization system are mathematically described. Based on this theory, a Doppler frequency tracking system is implemented via digital signal processing techniques utilizing a DSP chip, RAMs, PROMs, and a 80286 microprocessor. The performance of the designed system was evaluated through the experiments with the INTELSATVA satellite.

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Adaptive Timing Synchronization Algorithm for WiBro Uplink (WiBro 상향링크를 위한 적응적 시간동기 추정 알고리즘)

  • Kim, Jeong-Been;Jin, Young-Hwan;Kim, Kyung-Soo;Ahn, Jae-Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.11A
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    • pp.1068-1075
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    • 2006
  • An adaptive ranging technique for Orthogonal Frequency Division Multiple Access(OFDMA) uplink transmission is proposed for timing synchronization of multiple mobile stations located different distances from a base station. By combining the Timing Phase Compensated Frequency Domain Cross-correlation(TPCFDC) and Frequency Domain Differential Cross-correlation(FDDC), the proposed scheme reduces the number of correlators used in ordinary TPCFDC. Repeated initial ranging attempt with the FDDC in the proposed scheme greatly reduces the hardware implementation complexity. Simulation results for ranging success probability and average ranging attempts count show that the proposed algorithm performs similarly with the ordinary TPCFDC even with the 10 times reduced complexity.