• 제목/요약/키워드: Fixed Point Algorithm

검색결과 362건 처리시간 0.041초

멀티 세그먼트 카라츄바 유한체 곱셈기의 구현 (Implementation of the Multi-Segment Karatsuba Multiplier for Binary Field)

  • 오종수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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    • pp.129-131
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    • 2004
  • Elliptic Curve Cryptography (ECC) coprocessors support massive scalar multiplications of a point. We research the design for multi-segment multipliers in fixed-size ECC coprocessors using the multi-segment Karatsuba algorithm on GF($2^m$). ECC coprocessors of the proposed multiplier is verified on the SoC-design verification kit which embeds ALTERA EXCALIBUR FPGAs. As a result of our experiment, the multi-segment Karatsuba multiplier, which has more efficient performance about twice times than the traditional multi-segment multiplier, can be implemented as adding few H/W resources. Therefore the multi-segment Karatsuba multiplier which satisfies performance for the cryptographic algorithm, is adequate for a low cost embedded system, and is implemented in the minimum area.

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LPC 분석 알고리즘의 VHDL 구현 (VHDL Implementation of an LPC Analysis Algorithm)

  • 선우명훈;조위덕
    • 전자공학회논문지B
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    • 제32B권1호
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    • pp.96-102
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    • 1995
  • This paper presents the VHSIC Hardware Description Language(VHDL) implementation of the Fixed Point Covariance Lattice(FLAT) algorithm for an Linear Predictive Coding(LPC) analysis and its related algorithms, such as the forth order high pass Infinite Impulse Response(IIR) filter, covariance matrix calculation, and Spectral Smoothing Technique(SST) in the Vector Sum Exited Linear Predictive(VSELP) speech coder that has been Selected as the standard speech coder for the North America and Japanese digital cellular. Existing Digital Signal Processor(DSP) chips used in digital cellular phones are derived from general purpose DSP chips, and thus, these DSP chips may not be optimal and effective architectures are to be designed for the above mentioned algorithms. Then we implemented the VHDL code based on the C code, Finally, we verified that VHDL results are the same as C code results for real speech data. The implemented VHDL code can be used for performing logic synthesis and for designing an LPC Application Specific Integrated Circuit(ASOC) chip and DsP chips. We first developed the C language code to investigate the correctness of algorithms and to compare C code results with VHDL code results block by block.

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A Multi-mode LDPC Decoder for IEEE 802.16e Mobile WiMAX

  • Shin, Kyung-Wook;Kim, Hae-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권1호
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    • pp.24-33
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    • 2012
  • This paper describes a multi-mode LDPC decoder which supports 19 block lengths and 6 code rates of Quasi-Cyclic LDPC code for Mobile WiMAX system. To achieve an efficient implementation of 114 operation modes, some design optimizations are considered including block-serial layered decoding scheme, a memory reduction technique based on the min-sum decoding algorithm and a novel method for generating the cyclic shift values of parity check matrix. From fixed-point simulations, decoding performance and optimal hardware parameters are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 380,000 gates and 52,992 bits RAM, and the estimated throughput is about 164 ~ 222 Mbps at 56 MHz@1.8 V.

다층신경망의 학습능력 향상을 위한 학습과정 및 구조설계 (A multi-layed neural network learning procedure and generating architecture method for improving neural network learning capability)

  • 이대식;이종태
    • 경영과학
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    • 제18권2호
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    • pp.25-38
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    • 2001
  • The well-known back-propagation algorithm for multi-layered neural network has successfully been applied to pattern c1assification problems with remarkable flexibility. Recently. the multi-layered neural network is used as a powerful data mining tool. Nevertheless, in many cases with complex boundary of classification, the successful learning is not guaranteed and the problems of long learning time and local minimum attraction restrict the field application. In this paper, an Improved learning procedure of multi-layered neural network is proposed. The procedure is based on the generalized delta rule but it is particular in the point that the architecture of network is not fixed but enlarged during learning. That is, the number of hidden nodes or hidden layers are increased to help finding the classification boundary and such procedure is controlled by entropy evaluation. The learning speed and the pattern classification performance are analyzed and compared with the back-propagation algorithm.

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STRONG CONVERGENCE OF HYBRID ITERATIVE SCHEMES WITH ERRORS FOR EQUILIBRIUM PROBLEMS AND FIXED POINT PROBLEMS

  • Kim, Seung-Hyun;Kang, Mee-Kwang
    • 한국수학교육학회지시리즈B:순수및응용수학
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    • 제25권2호
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    • pp.149-160
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    • 2018
  • In this paper, we prove a strong convergence result under an iterative scheme for N finite asymptotically $k_i-strictly$ pseudo-contractive mappings and a firmly nonexpansive mappings $S_r$. Then, we modify this algorithm to obtain a strong convergence result by hybrid methods. Our results extend and unify the corresponding ones in [1, 2, 3, 8]. In particular, some necessary and sufficient conditions for strong convergence under Algorithm 1.1 are obtained.

PROXIMAL POINTS METHODS FOR GENERALIZED IMPLICIT VARIATIONAL-LIKE INCLUSIONS IN BANACH SPACES

  • He, Xin-Feng;Lou, Jian;He, Zhen
    • East Asian mathematical journal
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    • 제28권1호
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    • pp.37-47
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    • 2012
  • In this paper, we study generalized implicit variational-like inclusions and $J^{\eta}$-proximal operator equations in Banach spaces. It is established that generalized implicit variational-like inclusions in real Banach spaces are equivalent to fixed point problems. We also establish relationship between generalized implicit variational-like inclusions and $J^{\eta}$-proximal operator equations. This equivalence is used to suggest a iterative algorithm for solving $J^{\eta}$-proximal operator equations.

On the Selection of Burst Preamble Length for the Symbol Timing Estimate in the AWGN Channel

  • Lee, Seung-Hwan;Kim, Nam-il;Kim, Eung-Bae
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -3
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    • pp.2059-2062
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    • 2002
  • For detection of digitally modulated signals, the receiver must be provide with accurate carrier phase and symbol timing estimates. So far, tots of algorithms have been suggested for those purposes. In general, a interpolation filter with TED(Timing Error Detection) like Gardner algorithm is popularly used for symbol timing estimate of digital communication receiver. Apart from the performance point of view, a multiplicative operation of any interpolation filter limits the symbol rate of the system. Hence, we suggest a new symbol timing estimate algorithm for high speed burst-mode fixed wireless communication system and analyze its performance in the AWGN channel.

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고속 수렴 속도를 갖는 새로운 프랙탈 영상 복호화 알고리듬 (A new fractal image decoding algorithm with fast convergence speed)

  • 유권열;문광석
    • 전자공학회논문지S
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    • 제34S권8호
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    • pp.74-83
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    • 1997
  • In this paper, we propose a new fractal image decoding algorithm with fast convergence speed by using the data dependence and the improved initial image estimation. Conventional method for fractal image decoding requires high-degrdd computational complexity in decoding process, because of iterated contractive transformations applied to whole range blocks. On proposed method, Range of reconstruction imagte is divided into referenced range and data dependence region. And computational complexity is reduced by application of iterated contractive transformations for the referenced range only. Data dependence region can be decoded by one transformations when the referenced range is converged. In addition, more exact initial image is estimated by using bound () function in case of all, and an initial image more nearer to a fixed point is estimated by using range block division estimation. Consequently, the convergence speed of reconstruction iamge is improved with 40% reduction of computational complexity.

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Strong Convergence of a Bregman Projection Method for the Solution of Pseudomonotone Equilibrium Problems in Banach Spaces

  • Olawale Kazeem Oyewole;Lateef Olakunle Jolaoso;Kazeem Olalekan Aremu
    • Kyungpook Mathematical Journal
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    • 제64권1호
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    • pp.69-94
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    • 2024
  • In this paper, we introduce an inertial self-adaptive projection method using Bregman distance techniques for solving pseudomonotone equilibrium problems in reflexive Banach spaces. The algorithm requires only one projection onto the feasible set without any Lipschitz-like condition on the bifunction. Using this method, a strong convergence theorem is proved under some mild conditions. Furthermore, we include numerical experiments to illustrate the behaviour of the new algorithm with respect to the Bregman function and other algorithms in the literature.

SIFT 특징점을 이용한 4채널 서라운드 시스템의 동적 영상 정합 알고리즘 (Dynamic Stitching Algorithm for 4-channel Surround View System using SIFT Features)

  • 국중진;강대웅
    • 반도체디스플레이기술학회지
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    • 제23권1호
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    • pp.56-60
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    • 2024
  • In this paper, we propose a SIFT feature-based dynamic stitching algorithm for image calibration and correction of a 360-degree surround view system. The existing surround view system requires a lot of processing time and money because in the process of image calibration and correction. The traditional marker patterns are placed around the vehicle and correction is performed manually. Therefore, in this study, images captured with four fisheye cameras mounted on the surround view system were distorted and then matched with the same feature points in adjacent images through SIFT-based feature point extraction to enable image stitching without a fixed marker pattern.

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