• Title/Summary/Keyword: Electronics packaging

Search Result 439, Processing Time 0.02 seconds

RF Packaging and Mobile SiP Technology

  • Lee, Young-Min
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2006.10a
    • /
    • pp.283-291
    • /
    • 2006
  • [ $\blacksquare$ ] Mega Trends $\blacksquare$ Ceramic Based Module -> PCB Based SiP $\blacksquare$ Mobile SiP decreases footprint more than 40% than discrete

  • PDF

Trends of Packaging and Micro-joining Technologies for Car Electronics (자동차용 전장품의 패키징 및 마이크로 접합기술 동향)

  • Lee, Gyeong Ah;Cho, Do Hoon;Sri Harini, Rajendran;Jung, Jae Pil
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.29 no.1
    • /
    • pp.7-16
    • /
    • 2022
  • Recently, the automobile industry is rapidly changing due to technological development. Next-generation cars with high technology and new functions are on the market. It is essential to develop electronic devices to meet the condition of next-generation cars. In this study, the authors have reviewed recent trends of automotive electronics and packaging technology. Automotive electronics are used in harsh environments compared with other industries. Thus, it is important to improve the reliability of device junctions that directly affect electronics performance. Soldering, TLP (transient liquid phase bonding), and sintering are introduced for the bonding methods in car electronics.

Low-k Polymer Composite Ink Applied to Transmission Line (전송선로에 적용한 Low-k 고분자 복합 잉크 개발)

  • Nam, Hyun Jin;Jung, Jae-Woong;Seo, Deokjin;Kim, Jisoo;Ryu, Jong-In;Park, Se-Hoon
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.29 no.2
    • /
    • pp.99-105
    • /
    • 2022
  • As the chip size gets smaller, the width of the electrode line is also fine, and the density of interconnections is increasing. As a result, RC delay is becoming a problem due to the difference in resistance between the capacitor layer and the electrical conductivity layer. To solve this problem, the development of electrodes with high electrical conductivity and dielectric materials with low dielectric constant is required. In this study, we developed low dielectric ink by mixing commercial PSR which protect PCB's circuits from external factors and PI with excellent thermal property and low-k characteristics. As a result, the ink mixture of PSR and PI 10:3 showed the best results, with a dielectric constant of about 2.6 and 2.37 at 20 GHz and 28 GHz, respectively, and dielectric dissipation was measured at about 0.022 and 0.016. In order to verify the applicability of future applications, various line-width transmission lines produced on Teflon were evaluated, and as a result, the loss of transmission lines using low dielectric ink mixed with PI was 0.12 dB less on average in S21 than when only PSR was used.

TLP and Wire Bonding for Power Module (파워모듈의 TLP 접합 및 와이어 본딩)

  • Kang, Hyejun;Jung, Jaepil
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.26 no.4
    • /
    • pp.7-13
    • /
    • 2019
  • Power module is getting attention from electronic industries such as solar cell, battery and electric vehicles. Transient liquid phase (TLP) boding, sintering with Ag and Cu powders and wire bonding are applied to power module packaging. Sintering is a popular process but it has some disadvantages such as high cost, complex procedures and long bonding time. Meanwhile, TLP bonding has lower bonding temperature, cost effectiveness and less porosity. However, it also needs to improve ductility of the intermetallic compounds (IMCs) at the joint. Wire boding is also an important interconnection process between semiconductor chip and metal lead for direct bonded copper (DBC). In this study, TLP bonding using Sn-based solders and wire bonding process for power electronics packaging are described.

Exploring R&D Policy Directions for Semiconductor Advanced Packaging in Korea Based on Expert Interviews (국내 반도체 첨단패키징 R&D 정책방향: 산학연 전문가 조사를 중심으로)

  • S.J. Min;J.H. Park;S.S. Choi
    • Electronics and Telecommunications Trends
    • /
    • v.39 no.3
    • /
    • pp.1-12
    • /
    • 2024
  • As the demand for high-performance semiconductors, such as chips for artificial intelligence and high-bandwidth memory devices, increases along with the limitations of ultrafine processing technology in the semiconductor in-line process, advanced packaging becomes an increasingly important breakthrough technology for further improving semiconductor performance. Major countries, including Korea, the United States, Taiwan, and China, and large companies are strengthening their technological industry capabilities through the development of advanced packaging technology and policy support. Nevertheless, Korea has a lower level of development of related technologies by approximately 66% compared with the most advanced countries. Therefore, we aim to discover the needs for an advanced packaging research and development (R&D) policy through written expert interviews and importance satisfaction analysis. As a result, various implications for R&D policy directions are suggested to strengthen the technological capabilities and R&D ecosystem of the Korean advanced packaging technology.

Study of Diplexer Fabrication with Embedded Passive Component Chips (수동소자 칩 함몰공정을 이용한 Diplexer 구현에 관한 연구)

  • Youn, Je-Hyun;Park, Se-Hoon;Yoo, Chan-Sei;Lee, Woo-Sung;Kim, Jun-Chul;Kang, Nam-Kee;Yook, Jong-Gwan;Park, Jong-Chul
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2007.06a
    • /
    • pp.30-30
    • /
    • 2007
  • 현재 다양한 종류의 RF 통신 제품이 시장에 등장하면서 제품의 경쟁력 확보에 있어 소형화 정도가 중요한 이슈가 되고 있다. Passive Device는 RF Circuit을 제작할 때 많은 면적을 차지하고 있으며 이를 감소시키기 위해 여러 연구가 진행되고 있다. 가장 효과적인 방법으로 반도체 집적기술로 크기를 줄이는 방법이 있으나, 공정이 비싸고 제작 시간이 오래 걸려 제품개발 시간과 개발비용이 상승하게 된다. 반면에 SoP-L 공정은 PCB 제작에 이용되는 일반적인 재료와 공정을 사용하므로 개발 비용과 시간을 줄일 수 있다. SoP-L의 또 하나 장점은 다종 재료를 다층으로 구성할 수 있다는 점이다. 최근 chip-type의 Device를 PCB 기판 안에 내장하는 방법의 RF Circuit 소형화 연구가 많이 진행되고 있다. 본 연구에서는 SoP-L 공정으로 chip-type 수동소자를 PCB 기판 내에 함몰하여 수동소자회로를 구현, 분석하여 보았다. 수동소자회로는 880 MHz~960 MHz(GSM) 영역과 1.71 GHz~1.88 GHz(DCS) 영역을 나누는 Diplexer를 구성하였다. 1005 size의 chip 6개로 구현한 Diplexer를 표면실장과 함몰공정으로 제작하고 Network Analyzer로 측정하여 비교하였다. chip 표면실장으로 구현된 Diplexer는 GSM에서 최대 0.86 dB의 loss, DCS에서 최대 0.68 dB의 loss가 나타났다. 표면실장과 비교하였을 때 함몰공정의 Diplexer는 GSM 대역에서 약 0.5 dB의 추가 loss가 나타났으며 목표대역에서 0.6 GHz정도 내려갔다. 이 결과를 바탕으로 두 공정 간 차이점을 확인하고, 함몰공정으로 chip-type 수동소자를 사용하였을 때 고려해야 할 점을 분석하였다. 이를 바탕으로 SoP-L 함몰공정의 안정성을 높여서 이것을 이용한 회로의 소형화에 적용이 가능할 것으로 기대한다. 특히 능동소자의 DC Power Control에서 고용량의 수동소자를 이용할 때 집적도를 높일 수 있을 것이다.

  • PDF

Measurement Technologies of Mechanical Properties of Polymers used for Flexible and Stretchable Electronic Packaging (유연/신축성 전자패키징 용 폴리머 재료의 기계적 물성 측정 기술 리뷰)

  • Kim, Cheolgyu;Lee, Tae-Ik;Kim, Taek-Soo
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.23 no.2
    • /
    • pp.19-28
    • /
    • 2016
  • This paper presents an overview of selected advanced measurement technologies for the mechanical properties of polymers used for flexible and stretchable electronic packaging. Over the years, a variety of flexible and stretchable electronics have been developed due to their potential applications for next generation IT industry. To achieve more flexible and wearable devices for practical applications, the usage of polymeric components has been increased significantly. Therefore, accurate measurement of mechanical properties of the polymers is necessary in order to design mechanically reliable devices. However, the measurement has been challenging due to the soft nature and thin applications of polymers. Here, we describe novel measurement technologies of mechanical properties of polymers for flexible and stretchable electronics.

Study of Dispersibility and Dielectric Properties in $SrTiO_3$/COP Composites as the kind/content of Dispersants (분산제의 종류와 함량에 따른 $SrTiO_3$/사이클로올레핀폴리머 복합재료의 분산성 및 유전특성에 대한 연구)

  • Kim, Jun-Young;Lee, Jin-Won;Yoo, Myong-Jae;Lee, Woo-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.06a
    • /
    • pp.261-262
    • /
    • 2008
  • 분산제의 종류와 함량이 무기물-유기물 복합재료의 레올로지 특성 및 유전특성에 미치는 영향에 대하여 고찰하였다. 먼저 Multiple light scattering 방법을 통하여 용액의 입자 이동속도와 용액의 맑은층의 두께변화를 살펴보았으며 이를 통해 적정한 분산제의 선정 및 선정된 분산제의 함량비에 따른 무기물 분말의 분산 특성을 고찰하였다. 그리고 테이프 캐스팅을 통하여 테이프를 제작한 후 1GHz에서 유전특성을 측정하였다. 위 결과들을 통하여 분산제의 종류와 함량비에 따라 용액 및 슬러리의 특성이 다르며 적정한 분산제를 사용하여 유전상수 16.5에 유전손실 0.0058의 복합재료를 제작할 수 있었다.

  • PDF

Characterization of Optical Design for Optical MEMS (Optical MEMS 응용을 위한 광학 설계)

  • Eom, Yong-Sung;Park, Heung-Woo;Park, Jun-Hee;Choi, Byung-Seok;Lee, Jong-Hyun;Yun, Ho-Kyung;Choi, Kwang-Seung;Moon, Jong-Tae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2003.04a
    • /
    • pp.193-197
    • /
    • 2003
  • As one of the core technologies in the field of the optical communication with WDM, the optical cross connector with movements of micro mirrors is getting important day by day. The packaging structure of 2-dimensional NxN MOEMS switch should be determined by the harmonization of the following items such as the geometrical compatability between optical and structural components, the characteristics of optical input and output parts with device, and the electrical performance for the operation of micro mirrors. Therefore, the packaging process could be defined as the integrated technology completed by the optical and electrical science and the material science for the understanding of its thermo-mechanical properties with packaging materials. In the present study, the harmonization between the optical and structural components as well as the optical characteristics of lens system used will be investigated.

  • PDF