• 제목/요약/키워드: Discharging voltage

검색결과 288건 처리시간 0.03초

양극산화 불꽃 방전에 의한 Ti 산화피막의 표면특성 (Characterization of Surface at Ti Oxide Films Converted by Anodic Spark Discharge)

  • 송재주;한병성
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.545-546
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    • 2006
  • This study was performed to investigate the surface properties of electrochemically oxidized pure titanium by anodic spark discharging method. Commercially pure titanium plates of $10{\times}20{\times}1[mm]$ in dimensions were polished sequentially emery paper. Anodizing was performed at current density of $76.2\;[mA/cm^2]$, application voltage of 290, 350, 400 [V] using a regulated DC power supply, which allowed automatic transition constant current when a preset maximum voltage has been reached. The Ti surface oxided films was characterized by scanning electron microscope(SEM). The precipitation of HA(Hydroxyapatite) crystals on anodized surface was greatly accelerated by hydrothermal treatment. The concentrations of DL-$\alpha$-Glycerolphosphate Magnesiurn(DL-$\alpha$-GP-Mg) salt and Ca acetate in an electrolyte was highly affected the precipitation of HA crystals converted by Ti Anodized oxide films by Shape of Impulse Voltage.

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The Trap Characteristics of SILC in Silicon Oxide for SoC

  • Kang C. S.
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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    • pp.209-212
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    • 2004
  • In this paper, The stress induced leakage currents of thin silicon oxides is investigated in the nano scale structure implementation for Soc. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The channel current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $41\square\;and\;113.4\square,$ which have the channel width x length 10x1um, respectively. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the channel current. The stress induced leakage currents affected excitatory state and inhitory state.

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An Optimized Stacked Driver for Synchronous Buck Converter

  • Lee, Dong-Keon;Lee, Sung-Chul;Jeong, Hang-Geun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권2호
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    • pp.186-192
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    • 2012
  • Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

SMES 와 DVR을 이용한 전력계통품질 안정화 시스템 모델링 (Modeling of Power Quality Stabilization using SMES and DVR)

  • 박성열;정희열;김아롱;김재호;박민원;유인근;김석호;김해종;성기철
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.2251-2252
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    • 2008
  • Recently, voltage sag from sudden increasing loads is also one of the major problems inside the utility network. In order to compensate the voltage sag problem, power compensation device systems could be a good solution method. In case of voltage sag, an energy source is needed to overcome the energy loss caused by the voltage sag. Superconducting Magnetic Energy Storage (SMES) is a very promising source of this energy due to its fast response of charging and discharging time. Before constructing the power electronic delivering system for the SMES, it is necessary to simulate the system to understand its behavior. Nowadays, a lot of devices have been developed to compensate voltage sag such as Dynamic Voltage Restorer (DVR), Distribution Static Compensator (D-STATCOM) and Uninterruptible Power Supply (UPS). In this paper, focus is given only on DVR system which will be simulated by using PSCAD/EMTDC software.

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200MW MODULATOR의 출력안정화를 위한 DE-Q'ING SYSTEM에 관한 연구 (Study on the De-Q'ing System for the Output Voltage Stabilization of a 200MW Modulator)

  • 손윤규;오종석;조무현;남궁원
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 C
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    • pp.1612-1614
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    • 1994
  • Modulators Installed in PLS(Pohang Light Source) Linac are composed of a DC high voltage section, a charging section and a discharging section. PFN is charged by a resonant charging mechanism, and discharged by a switching device through the primary of the pulse transformer connected to a load. Charged PFN voltage must be well regulated to obtain stable output pulse voltage at the load. For this purpose, DCHV is controlled by a SCR controller with feedback signal, and PFN voltage is regulated by a De-Q'ing circuit. The full power operation test shows the pulse voltage regulation within ${\pm}0.13%$ with SCR feedback control alone, and within ${\pm}0.08%$ together with De-Q'ing. This paper describes the design concept and operational characteristics of the De-Q'ing circuit.

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플라잉 커패시터 멀티레벨 인버터의 플라잉 커패시터 전압 균형을 위한 멀리 캐리어 PWM 기법에 대한 연구 (A Study on the Multi-carrier PWM Methods for Voltage Balancing of Flying Capacitor in the Flying Capacitor Multi-level Inverter)

  • 진범승;김태진;강대욱;현동석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.298-301
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    • 2005
  • The flying capacitor voltage control of the flying capacitor multi-level inverter (FCMLI) is very important for safe operation. The voltage unbalancing of flying capacitors caused serious problems in safety and reliability of system. In the FCMLI, balancing problem of the flying capacitor has its applications limited. The voltage unbalance is occurred by the difference of each capacitors charging and discharging time applied to FCMLI. This paper investigates and analyzes multi-carrier PWM methods to solve capacitor voltage balancing problem. The Phase-Shift PWM (PSPWM) method that is commonly used, The Modified Carrier-Redistribution PWM (MCRPWM) method and The Saw-Tooth-Rotation PWM (STRPWM) method are discussed and compared with respect to switching state, balancing voltage of capacitors and output waveform. These three PWM methods are analyzed by using a flying capacitor three-level inverter and provided result through simulation. Finally, the harmonics about the output voltages of their methods are compared using the harmonic distortion factor (HDF).

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게이트 전류 감지 구조를 이용한 향상된 레귤레이션 특성의 LDO regulator (LDO regulator with improved regulation characteristics using gate current sensing structure)

  • 정준모
    • 전기전자학회논문지
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    • 제27권3호
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    • pp.308-312
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    • 2023
  • 게이트 전류 감지 구조는 LDO 레귤레이터가 오버슈트 또는 언더슈트 상황 발생 시 출력전압의 레귤레이션을 보다 효과적으로 제어하기 위해 제안되었다. 기존의 전형적인 LDO 레귤레이터는 부하전류가 변화할 때 레귤레이션 전압 변화가 발생한다. 하지만 게이트 전류 감지 구조를 이용하여 패스 트랜지스터에 있는 게이트 단자 전류를 공급/방전 함으로 인해 패스 트랜지스터의 동작 속도를 더욱 향상시킬 수 있다. 게이트 전류 감지 구조를 이용한 LDO 레귤레이터의 입력전압은 3.3 V ~ 4.5 V 이며 출력 전압은 3 V이고 부하 전류는 최대 250 mA의 값을 갖는다. 시뮬레이션 결과, 부하 전류가 250 mA 까지 변화할 때 약 9 mV의 전압 변화 값을 확인하였다.

The Study on the Trap Density in Thin Silicon Oxide Films

  • 강창수;김동진
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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    • pp.43-46
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    • 2000
  • In this paper, the stress and transient currents associated with the on and off time of applied voltage were used to measure the density and distribution of high voltage stress induced traps in thin silicon oxide films. The transient currents were due to the discharging of traps generated by high stress voltage in the silicon oxides. The trap distributions were relatively uniform near both cathode and anode interface. The trap densities were dependent on the stress polarity. The stress generated trap distributions were relatively uniform the order of $10^{11}\sim10^{21}$[states/eV/$cm^2$] after a stress. The trap densities at the oxide silicon interface after high stress voltages were in the $10^{10}\sim10^{13}$[states/eV/$cm^2$]. It appear that the stress and transient current that flowed when the stress voltage were applied to the oxide was caused by carriers tunneling through the silicon oxide by the high voltage stress generated traps.

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New Isolated Single-Phase AC-DC Converter for Universal Input Voltage

  • Lee, Ming-Rong;Yang, Lung-Sheng;Lin, Chia-Ching
    • Journal of Power Electronics
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    • 제13권4호
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    • pp.592-599
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    • 2013
  • This paper investigates a new isolated single-phase AC-DC converter, which integrates a modified AC-DC buck-boost converter with a DC-DC forward converter. The front semi-stage is operated in discontinuous conduction mode (DCM) to achieve an almost unity power factor and a low total harmonic distortion of the input current. The rear semi-stage is used for step-down voltage conversion and electrical isolation. The front semi-stage uses a coupled inductor with the same winding-turn in the primary and secondary sides, which is charged in series during the switch-on period and is discharged in parallel during the switch-off period. The discharging time can be shortened. In other words, the duty ratio can be extended. This semi-stage can be operated in a larger duty-ratio range than the conventional AC-DC buck-boost converter for DCM operation. Therefore, the proposed converter is suitable for universal input voltage (90~264 $V_{rms}$) and a wide output-power range. Moreover, the voltage stress on the DC-link capacitor is low. Finally, a prototype circuit is implemented to verify the performance of the proposed converter.

공기-플라즈마 방전 시스템에서 화학적 활성종의 생성에 대한 연구 (Study on the Generation of Chemically Active Species using Air-plasma Discharging System)

  • 김동석;박영식
    • 한국물환경학회지
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    • 제28권3호
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    • pp.401-408
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    • 2012
  • High-voltage dielectric discharges are an emerging technique in environmental pollutant degradation, which that are characterized by the production of hydroxyl radicals as the primary degradation species. The initiation and propagation of the electrical discharges depends on several physical, chemical, and electrical parameters such as 1st and 2nd voltage of power, gas supply, conductivity and pH. These parameters also influence the physical and chemical characteristics of the discharges, including the production of reactive species such as OH, $H_2O_2$ and $O_3$. The experimental results showed that the optimum 1st voltage and air flow rate for RNO (N-Dimethyl-4-nitrosoaniline, indicator of the generation of OH radical) degradation were 160 V (2nd voltage of is 15 kV) and 4 L/min, respectively. As the increased of the 2nd voltage (4 kV to 15 kV), RNO degradation, $H_2O_2$ and $O_3$ generation were increased. The conductivity of the solution was not influencing the RNO degradation and $H_2O_2$ and $O_3$ generation. The effects pH was not high on RNO degradation. However, the lower pH and the conductivity, the higher $H_2O_2$ and $O_3$ generation were observed.