• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.3
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• pp.259-265
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• 2012

This paper introduces a method for design and implementation of a current controller for boost converter operating in continuous conduction mode (CCM) using a digital signal processor (DSP). A Proportional-Integral (PI) type current controller outputs an average voltage command for inductor, used in the input side of the boost converter, and the duty-ratio of PWM (pulse width modulation) signal for switching device is directly calculated from the average voltage command. The gains of the PI current controller are selected such that the current response characteristics are the same as those of a first-order low-pass filter. The proposed current control scheme is implemented using a DSP based on fixed-point math operations and an experimental study has been performed to validate the proposed method.

• Journal of Welding and Joining
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• v.23 no.4
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• pp.53-58
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• 2005

We designed a weld monitoring system with UV and IR sensors using a embedded DSP controller for implementing a distribution system; running stand alone and communication with outside by industrial standard protocols. Also this system provided a USB port in order to be acquiring data in PC. The user interface program in PC visualized the IR and W data in time, frequency and state space. A correlation of IR and UV signals showed closely related to weld quality. A rapid change of geometry can be found through a moving average filter. And the average value of IR signal at an interval represented a welding width and depth. Through these results, we proposed a monitoring algorithm for a integer type DSP.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.469-471
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• 1999

In this paper, the method of Space-Vector Pulse Width Modulation(SVPWM) with Fuzzy Logic Regulator(FLR) is proposed. In a conventional SVPWM, the procedures of phase transformation and choosing PWM patterns are complex. So, it should be implemented with high performance processor like Digital Signal Processor(DSP). In order to reduce a calculation burden, a proposed system adopts FLR. Using a linguistic contro strategy based on expert knowledge, FLR relieves the processor from a heavy computations. In simulations, the proposed system is validated.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.8 no.2
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• pp.41-45
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• 1994

In this paper, it is implemented that Sub- MRA PWM techinque which is applied to MRA PWM technique using the Digital Signal Processor. Unstable element of analog is reduced for Sub - MRA PWM technique by digital signal pressing. And harmonic is analized by simulation to verify that. It is afford the process induction motor control with real time by minimizing the delay time of digital system. Time delay which is a defect of digital control can by minimized using fast caculation. Therefore, real time control is implemented in the induction motor

• Journal of Digital Contents Society
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• v.8 no.3
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• pp.341-346
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• 2007

The purpose of this paper is to propose the design of VADSM(Value-Added Digital Speaker Module) which tunes up the speaker unit by measuring the speaker's frequency responses and controlling EQ band. This module can reduce audible distortions at particular frequency band and improve some flatness in the speaker's frequency response. VADSM is composed of DSP AMP and speaker unit. When a speaker transforms electrical signal to sound, the magnitude response at some frequencies are more or less than normal level. So, DSP AMP can be used to adjust those magnitudes up or down by controlling its EQ bands.

• Journal of Satellite, Information and Communications
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• v.12 no.2
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• pp.1-10
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• 2017

In this paper we propose three existing reflection removal algorithms and one proposed algorithm to estimate accurate targets in near field using IR-UWB (Impulse-Radio Ultra Wideband) radar. The received signal includes unnecessary reflected wave signals to the target signal. A reflective cancellation algorithm was used to remove unnecessary signals and estimate only the correct target signal. The location of the targets is estimated in real time with one transmitting antenna and one receiving antenna. In order to overcome the disadvantages of the existing three reflection removal algorithms, we propose a new reflection removal algorithm and estimate the most accurate target. Also we used DSP(Digital Signal Processor) to install the external mounting of vehicles. This paper will contribute to the study of the future reflections.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.6
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• pp.27-33
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• 1984

This paper is an experimental gaudy on the digital hardware implementation of the R2-MF Receiver for 32 channel configurations used in signalling systems between ESS. There are many methods to detect MF signal by DSP techniques, but the requirement for MF detection needs not sharp frequency response, needs only decision about some specific frequencies exist or not at discrete frequency sampling points. The hardware used to implement this algorithm is Am 2900 series "bit-slice microprocessor" chips based on the microprogramming techniques for real time signal processing. And we used the additional Z-80A processor chips for the system control and the decision about which is the right MF signal from the detected MF spectrums. Hence we could enhance the flexibilities of the hardware and the software, this leads that this system is well suits for signalling systems used in TDM ESS.n TDM ESS.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.137-139
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• 2006

This paper present an implementation of digital control system for a phase-shift full-bridge converter using a digital signal processor. The digital control of phase-shift full-bridge converter provides many advantageous of easily generating various phase-shift timing and implementing a complex voltage and current control algorithm. The digital controller is implemented using the DSP TMS320F2812 and the converter and controller operation is proved through the experimental results.

• International Journal of Highway Engineering
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• v.15 no.6
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• pp.41-47
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• 2013

PURPOSES : The purpose of this study is about noise which is generated from roads and is consist of irregular frequency variation from low frequency to various band. The existing methods of noise reduction are sound barrier that uses insulation material and absorbing material or have applied passive technology of noise reduction by devices. The total frequency band is needed to apply active noise control. METHODS : In this study applies to the field of road traffic environment, signal processing controller and various analog signal input/output, the amplifier module is based on parallel-core embedded processor designed. DSP performs the control algorithm of the road traffic noise. Noise sources in the open space performance of evaluation were applied. In this study, controller of active signal processor was designed based on the module of audio input/output and main controller of embedded process. The controller of active signal processor operates noise reduction algorithm and performance tests of noise reduction in inside and outside environment were executed. RESULTS : The signal processing controller with OMAP-L137 parallel-core processors as the center, DSP processors in the active control operations dealt with quickly. To maximize the operation speed of an object and ARM processor is external function keys and display for functions and evaluating the performance management system was designed for the purpose of the interface. Therefore the reduction of road traffic noise has established an electronic controller-based noise reduction. CONCLUSIONS : It is shown that noise reduction is effective in the case of pour tonal sound and complex tonal sound below 500Hz by appling to Fx-LMS.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.820-822
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• 2005

We have designed a 32-bit microprocessor with fixed point digital signal processing functionality. This processor, combines both general-purpose microprocessor and digital signal processor functionality using the reduced instruction set computer design principles. It has functional units for arithmetic operation, digital signal processing and memory access. They operate in parallel in order to remove stall cycles after DSP or load/store instructions, which usually need one or more issue latency cycles in addition to the first issue cycle. High performance was achieved with these parallel functional units while adopting a sophisticated five-stage pipeline stucture.