• Title/Summary/Keyword: Decoupling Network

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On-chip Decoupling Capacitor for Power Integrity (전력 무결성을 위한 온 칩 디커플링 커패시터)

  • Cho, Seungbum;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.3
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    • pp.1-6
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    • 2017
  • As the performance and density of IC devices increase, especially the clock frequency increases, power grid network integrity problems become more challenging. To resolve these power integrity problems, the use of passive devices such as resistor, inductor, and capacitor is very important. To manage the power integrity with little noise or ripple, decoupling capacitors are essential in electronic packaging. The decoupling capacitors are classified into voltage regulator capacitor, board capacitor, package capacitor, and on-chip capacitor. For next generation packaging technologies such as 3D packaging or wafer level packaging on-chip MIM decoupling capacitor is the key element for power distribution and delivery management. This paper reviews the use and necessity of on-chip decoupling capacitor.

Multiple Antenna System for Next Generation Mobile Communication (차세대 이동 통신용 다중 안테나 시스템)

  • Han, Min-Seok;Choi, Jae-Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.660-669
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    • 2010
  • In this paper, a multiple antenna system for next generation mobile applications is proposed. The proposed MIMO antenna consists of two parallel folded monopole antennas with the length of 100 mm and spacing of 6 mm and a decoupling network which locates at the top side of a mobile handset. In order to improve the isolation characteristic at the LTE band 13, a decoupling network was added between the two antenna elements placed close to each other. The decoupling network, consisting of two transmission lines, a shunt reactive component and common ground line, is simple and compact. To obtain the wide bandwidth characteristic, an wide folded patch structure generating the strong coupling between feeding and shorting lines through the slit is used at the bottom side of a mobile handset. Also, the performance of a multiple antenna system composed of three antenna elements is analyzed.

Scalable and Robust Data Dissemination Scheme for Large-Scale Wireless Sensor Networks (대규모 무선 센서 네트워크를 위한 확장성과 강건성이 있는 데이터 전송 방안)

  • Park, Soo-Chang;Lee, Eui-Sin;Park, Ho-Sung;Lee, Jeong-Cheol;Oh, Seung-Min;Jung, Ju-Hyun;Kim, Sang-Ha
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.12B
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    • pp.1359-1370
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    • 2009
  • In wireless sensor networks, data dissemination is based on data-centric routing that well matches the publish/subscribe communication paradigm. The publish/subscribe paradigm requires decoupling properties: space, time, and synchronization decoupling. For large-scale applications, the three decoupling properties provide scalability and robust communication. However, existing data dissemination schemes for wireless sensor networks do not achieve full decoupling. Therefore, we propose a novel data dissemination scheme that fully accomplishes the three decoupling, called ARBIETER. ARBITER constructs an independent network structure as a logical software bus. Information interworking between publishers and subscribers is indirectly and asynchronously performed via the network structure. ARBITER also manages storage and mapping of queries and data on the structure because of supporting different time connection of publishers and subscribers. Our simulation proves ARBITER show better performance in terms of scalability, network robustness, data responsibility, mobility support, and energy efficiency.

Decoupling Capacitance Allocation at the Floorplan Level for Power Supply Noise Reduction (전원 잡음을 줄이기 위한 평면계획 단계에서의 Decoupling Capacitance 할당)

  • Heo Chang-Ryong;Rim Chong-Suck
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.61-72
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    • 2005
  • This paper proposes a method which efficiently allocates decoupling capacitance to reduce power supply noise at the floorplan level. We observe problems of previous approach that the decoupling capacitance of each module was overestimated and the power supply noises of modules were changed by inserting additional area for decoupling capacitance, and then suggest a new approach. And, we also present a simple heuristic method which can effectively allocate white space modules for decoupling capacitance area within more faster time instead of LP technique. Experimental results show that our approach can reduce the area of decoupling capacitance to average 7.9 percent compared with Zhao's approach in [4]. Therefore both total area and wire length of nniflm result are decreased. Also, we confirm that our approach solves well the problem caused by inserting additional area. In execution time comparison, our approach shows average 11.6 percent improvement.

IPM control using by neural network and sliding mode control (신경회로망과 슬라이딩 모드제어를 이용한 IPM 제어)

  • Kim, Jae-Hoon;Yoon, Tae-Sung;Park, Seung-Kyu
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1587-1588
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    • 2007
  • IPM(Interior Permanent Magnet) Machine의 전류 제어는 자기저항에 의존하는 토크특성 때문에 SPM(Surface Permanent Ma- gnet) Machine보다 복잡하다. 고성능 토크제어를 위해서는 d축 전류와 q축 전류의 동특성간의 상태 decoupling이 요구된다. 그러나 전류의 상태 동특성이 coupling된 인덕턴스의 변화(온도, 파라미터들의 부정확한 측정값)는 상태 decoupling을 어렵게 한다. 그래서 이러한 변화와 각각의 전류가 독립적으로 제어될 수 있게 여러 decoupling 방법들에 초점이 맞춰지고있다. 본 연구는 외란에 강하고, 특히 인덕턴스의 변화와 상관없는 이상적인 토크제어를 하기 위해 신경회로망을 이용하여 슬라이딩 평면(sliding surface)을 구성하고, SMC(Sliding Mode Control)를 이용하여 상태 cross-coupling의 decoupling을 위한 새로운 접근을 제안한다. 이 방법은 PI제어 성능과 SMC의 강인성을 알고리즘을 이용하여 결합한 것이라고 볼 수도 있다.

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An Effective Power/Ground Network Design of VLSI Circuits to Suppress RLC Resonance Effects (공진현상을 감소시키기 위한 효율적인 파워/그라운드 네트워크 디자인)

  • Ryu, Soon-Keol;Eo, Yung-Seon;Shim, Jong-In
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.435-438
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    • 2004
  • This paper presents a new analytical model to suppress RLC resonance effects in power/ground lines due to a decoupling capacitor. First, the resonance frequency of an RLC circuit which is composed of package inductance. decoupling capacitor, and output drivers is accurately estimated. Next, using the estimated resonance frequency, a suitable decoupling capacitor sire is determined. Then, a novel design methodology to suppress the resonance effects is developed. Finally, its validity is shown by using $0.18 {\mu}m$ process-based-HSPICE simulation.

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Multilayer Power Delivery Network Design for Reduction of EMI and SSN in High-Speed Microprocessor System

  • Park, Seong-Geun;Kim, Ji-Seong;Yook, Jong-Gwan;Park, Han-Kyu
    • Journal of electromagnetic engineering and science
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    • v.2 no.2
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    • pp.68-74
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    • 2002
  • In this paper, a pre-layout design approach for high-speed microprocessor is proposed. For multilayer PCB stark up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system. The system model includes VRM, decoupling capacitors, multiple power and ground planes for core voltage, vias, as well as microprocessor. Finally, the simulation results are verified by measurements data.

Effective Power/Ground Network Design Techniques to suppress Resonance Effects in High-Speed/High-Density VLSI Circuits (고속/고밀도 VLSI 회로의 공진현상을 감소시키기 위한 효율적인 파워/그라운드 네트워크 설계)

  • Ryu Soon-Keol;Eo Yung-Seon;Shim Jong-In
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.7 s.349
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    • pp.29-37
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    • 2006
  • This paper presents a new analytical model to suppress RLC resonance effects which inevitably occur in power/ground lines due to on-chip decoupling capacitor and other interconnect circuit parasitics (i.e., package inductance, on-chip decoupling capacitor, and output drivers, etc.). To characterize the resonance effects, the resonance frequency of the circuit is accurately estimated in an analytical manner. Thereby, a decoupling capacitor size to suppress the resonance for a suitable circuit operation is accurately determined by using the estimated resonance frequency. The developed novel design methodology is verified by using $0.18{\mu}m$ process-based-HSPICE simulation.

Modeling of Arbitrary Shaped Power Distribution Network for High Speed Digital Systems

  • Park, Seong-Geun;Kim, Jiseong;Yook, Jong-Gwan;Park, Han-Kyu
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.324-327
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    • 2002
  • For the characterization of arbitrary shaped printed circuit board, lossy transmission line grid model based on SPICE netlist and analytical plane model based on the segmentation method are proposed in this paper. Two methods are compared with an arbitrary shaped power/ground plane. Furthermore, design considerations for the complete power distribution network structure are discussed to ensure the maximum value of the PDN impedance is low enough across the desired frequency range and to guide decoupling capacitor selection.

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Design and Fabrication of a Surge Generator with Coupling/Decoupling Networks (커플링/디커플링 네트워크 내장 서지발생장치의 설계 및 제작)

  • Kim, Nam-Hoon;Kang, Tae-Ho;Shin, Han-Sin;Kil, Gyung-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.2
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    • pp.130-134
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    • 2020
  • Metal oxide varistors (MOVs) protect circuits and devices from transient overvoltages in electric power systems. However, a MOV continuously deteriorates owing to manufacturing defects or repetitive protective operations from transient overvoltages. A deteriorated MOV may result in a short circuit or a line-ground accident. Previous studies focused on the analysis of deterioration mechanisms and condition diagnosis techniques for MOVs owing to their recent growth of use. An accelerated deterioration experiment under the same conditions in which a MOV operates is essential. In this study, we designed and fabricated a surge generator that can apply a surge current to a MOV connected to AC mains. The coupling network operates at a low impedance against the surge current from the surge generator and transfers the surge current to the MOV under test. It also acts as a high impedance against AC mains for the AC voltage not to be applied to the surge generator. The decoupling network operates at a high impedance against the surge current and blocks the surge current from AC mains. It also acts as a low impedance against AC mains for the AC voltage to be applied to the MOV under test. The prototype surge generator can apply the 8/20 us up to 15 kA on AC voltages in the approximate range of 110~450 V, and it fully operates on a LabVIEW-based program.