• Journal of Power Electronics
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• v.10 no.6
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• pp.667-672
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• 2010

A way how to teach a general understanding of switched mode power supplies (SMPS) is shown. A fourth order PWM DC-to-DC converter with limited duty cycle range is treated as an example and a survey over important data (maximum voltage and current ratings for the elements, rms- values for the semiconductor devices and a rough approximation of the losses) of the circuit is given. Furthermore, a converter model based on duty ratio averaging is established. Continuous mode of operation is used. The results make it possible to estimate the applicability of the given converter structure and offer sufficient material for the calculation, design, and analysis and give a better insight into switched mode energy conversion.

• Journal of the Korean Society of Industry Convergence
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• v.24 no.6_2
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• pp.919-926
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• 2021

In this paper, a study was conducted on the miniaturization of an e-Mobility battery charger module using GaN-FET. GaN-FET is one of the types of WBG devices, and it is a device that exceeds the performance of existing Si power semiconductors. In particular, GaN-FET has the advantage of small packaging size and high switching frequency operation, which is advantageous for miniaturization of power converters. Therefore, a bidirectional DC/DC converter module for e-mobility charging using GaN-FET was developed. To apply to the converter to be developed, analysis is performed on the characteristics of GaN-FET, and after manufacturing a prototype of a bidirectional DC/DC converter module, the efficiency and temperature data of the power converter are analyzed to verify its feasibility.

• Journal of Power Electronics
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• v.11 no.2
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• pp.188-193
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• 2011

A highly efficient AC-DC converter for small wind power generation systems using a brushless DC generator (BLDCG) is presented in this paper. The market standard AC-DC converter for a BLDCG consists of a three-phase diode rectifier and a boost DC-DC converter, which has an IGBT and a fast recovery diode (FRD). This kind of two-stage solution basically suffers from a large amount of conduction loss and the efficiency greatly decreases under a light load, or at a low current, because of the switching devices with a P-N junction. In order to overcome this low efficiency, especially at a low current, a three-phase bridgcless converter consisting of three upper side FRDs and three lower side Super Junction FETs is presented. In the overall operating speed region, including the cut-in speed, the efficiency of the proposed converter is improved by up to 99%. Such a remarkable result is validated and compared with conventional solutions by calculating the power loss based on I-V curves and the switching loss data of the adopted commercial switches and the current waveforms obtained through PSIM simulations.

• Journal of Navigation and Port Research
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• v.32 no.9
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• pp.705-709
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• 2008

In the sea various methods have been conducted to capture wave energy which include the use of pendulums, pneumatic devices, etc. Floating devices, such as a cavity resonance device take advantages of both the water motion and the wave induced motions of the floating body itself. The wave energy converter is known commercially as the WAGB(Wave Activated Generator Buoy) and is used in some commercially available buoys to power navigation aids such as lights and horns. This wave energy converter consists of a circular flotation body which contains a vertical water column that has free communication with the sea. A theoretical analysis of this power generated by a pneumatic type wave energy converter is performed and the results obtained from the analysis are used for a real wave energy converter buoy. This paper is shown to have an optimum value for which maximum power is obtained at a given resonant wave period Also, the length of the internal water column corresponds to that of the water mass in the water column. If designed properly, wave energy converter can take advantage not only of the cavity resonance, but also qf the heaving motion of the buoy. Finally, simulation is performed with a LabVIEW program and the simulation results are applied to a wave energy simulator for modifying design data for a wave energy converter.

• Journal of Power Electronics
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• v.11 no.4
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• pp.533-541
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• 2011

The redundant operation of a parallel AC to DC converter via a serial communication bus is presented. The proposed system consists of three isolated CUK power factor correction modules. The controller for each converter is a dsPIC30F6010 microcontroller while a RS485 communication bus and the clock signal are used for synchronizing the data communication. The control strategy of the redundant operation relies on the communication of information among each of the modules, which communicate via a RS485 serial bus. This information is received from the communication checks of the converter module connected to the system to share the load current. Performance evaluations were conducted through experimentation on a three-module parallel-connected prototype, with a 578W load and a -48V dc output voltage. The proposed system has achieved the following: the current sharing is quite good, both the transient response and the steady state. The converter modules can perform the current sharing immediately, when a fault is found in another converter module. In addition, the transient response occurs in the system, and the output voltages are at their minimum overshoot and undershoot. Finally, the proposed system has a relatively simple implementation for the redundant operation.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.45-48
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• 2001

An programmable current-mode folding and interpolation analog to digital converter (ADC) with programmable interpolator is proposed in this paper. A programmable interpolator is employed not only to vary the resolution of data converter, but also to decrease a power dissipation within the ADC. Because of varying the number of interpolation circuits, resolution is vary from 6 to 10bit. The designed ADC fabricated by a 0.6${\mu}{\textrm}{m}$ n-well CMOS double metal/single poly process. The experimental result shows the power dissipation from 26 to 87mW with a power supply of 3.3V.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.153-156
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• 2001

This paper describes a 12-bit high speed pipeline CMOS A/D converter. The A/D converter simulated the 0.35${\mu}{\textrm}{m}$ n-well CMOS technology. The results show DNL and INL of $\pm$0.5LSB and $\pm$1.0LSB, conversion rate of 100Msamples/s, and power dissipation of 500㎽ with a power supply of 3.3V

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.1C
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• pp.14-23
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• 2003

This thesis proposes a sigma-delta modulator architecture with 2 Ms/s data rate and 12 bit resolution. A sigma-delta modulate has the features of oversampling and noise shaping. With these features, it can be connected with low resolution A/D converter to achieve higher resolution A/D converter. Most previous researches have been concentrated on high resolution but low data rate applications, e.g. audio applications. But, in order to be applied to various applications such as wireless data communication, researches on sigma-delta modulator architecture for higher data rate are required. The proposed sigma-delta modulator architecture has the sampling rate of 16 times Nyquist rate to achieve high data rate, and consists of a cascade of two 2nd order sigma-delta modulator to get relatively high resolution. The experimental result shows that the proposed architecture achieves 12-bit resolution at 2 Ms/s data rate.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2001.05a
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• pp.166-171
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• 2001

A digital seismic data acquisition and processing system using a PC has been developed in order to replace the analog data acquisition system of shallow marine seismic survey. An A/D converter that has 12bits of resolution and 225KHz of conversion rate was ued to acquire data, and a data acquisition software was developed as a Windows program which provides convenience of use. Raw data acquired at field has been saved to the hard-disk simultaneously. The signal to noise ratio, vertical and horizontal resolution could be improved by a digital data processing of the raw data. The digital processing of the raw data includss gain recovery, filtering, deconvolution, and muting. With the prediction deconvolution algorithm multiple reflections appearing on the shallow marine seismic section could be removed successfully.

• Journal of the Korea Convergence Society
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• v.7 no.1
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• pp.9-15
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• 2016

In this paper, we describe the design of a high speed data acquisition system(DAS) with STM32 processor based on Cortex-M4. The system is used for the sensor devices to collect raw data on production lines at factory and send them to the servo computer in real time. The system is designed for multi functions with universal asynchronous receiver and transmitter(UART), analog to digital converter(ADC), digital to analog converter(DAC), and general purpose input output(GPIO). those are well tested for various data acquisition and high speed motor control in real time.