• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
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• pp.151-155
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• 2003

The requirements for harsh environment electronic controllers in automotive applications have been steadily becoming more and more stringent. Electronic substrate technologists have been responding to this challenge effectively in an effort to meet the performance, reliability and cost requirements. An effect of the plasma cleaning at the alumina substrate and the IMC layer between $Sn-37wt\%Pb$ solder and Ag-Pd thick film conductor after reflow soldering has been studied. Organic residual carbon layer was removed by the substrate plasma cleaning. So the interfacial adhesive strength was enhanced. As a result of AFM measurement, Ag-Pd conductor pad roughness were increased from 304nm to 330nm. $Cu_6Sn_5$ formed during initial ref]ow process at the interface between TiWN/Cu UBM and solder grew by the succeeding reflow process so the grains had a large diameter and dense interval. A cellular-shaped $Ag_3Sn$ was observed at the interface between Ag-Pd conductor pad and solder. The diameters of the $Ag_3Sn$ grains ranged from about $0.1\~0.6{\mu}m$. And a needle-shaped $Ag_3Sn$ was also observed at the inside of the solder.

• 한국전기전자재료학회논문지
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• 제17권6호
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• pp.575-579
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• 2004

Package reliability test was conducted to investigate the effect of solder paste composition at BGA Package. It was found that the shape and size of the phase form are affected by the processing parameters. The material have used to fill in the via was Sn/36Pb/2Ag and Sn/0.75Cu type solder paste. Sn/36Pb/2Ag and Sn/0.75Cu paste were fabricated on Tape-BGA substrates by screen printing process, and via ball mount data were characterized with variations of dwell time of 85 seconds at reflow peak temperature at 22$0^{\circ}C$ or 24$0^{\circ}C$. The test condition was MRT 30 $^{\circ}C$/60 %RH/96 HR. Failures formed of a ball-off in solder paste process were observed by using a Optical Microscope and SEM(Scanning Electron Microscope). It was concluded that intermetallic layer growth played important roles in increasing solder fatigue strength for addition of Ag composition. The degradation of shear strength of solder composition is discussed.

• 한국생산제조학회지
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• 제20권2호
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• pp.187-192
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• 2011

UBM(Under Bump Metallurgy) is very important for successful realization of Flip-Chip technology. In this study, it is investigated the interfacial reactions between various Sn-Ag solder alloys and Ni-P/Au UBM and Cu plate finish. It is also evaluated the shear strength by using the micro shear-punch test method for Sn-37Pb alloy, binary and ternary alloys of environment-friendly Pb-free solder alloys which are applied in the electronic packages. In terms of interfacial microstructure, the Pb-free solder joints have thicker IMCs than the Sn-Pb solder joints. The thickness of IMC is related to Reflow time. The IMC has been observed to grow with the increase in Reflow time. As a result of the shear test, in case of Max. shear strength, Pb-free solder showed the highest strength value and Sn-37Pb showed the lowest strength value 10 be generally condition of Reflow time.

• 한국초전도ㆍ저온공학회논문지
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• 제12권2호
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• pp.9-12
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• 2010

A lamination system using reflow soldering was developed to enhance the mechanical properties of high temperature superconductor (HTS) tape. The laminated coated conductor tape was fabricated using the continuous lamination process. The mean, maximum, and minimum tensile loads in a T-peel test of the laminated coated conductor were 9.9 N, 12.5 N, and 7.6 N, respectively. The critical current ($I_c$) distributions of the non-laminated and laminated coated conductor were compared using anon-contact Hall probe method. The transport $I_c$ nearly matched the non-contact $I_c$; however, some degraded Ic regions were found on the length of 800 cm of laminated coated conductor. We confirmed that the cause of the partially degraded $I_c$ was due to an increase in line tension by (1) solidification induced by a change of composition that usually occurs in molten brass (Cu, Zn) in solder, or (2) non-homogeneity of the thickness of the coated conductor or metal tapes. We suggest that reflow soldering is a promising method for reinforced HTS tape if the controlling solder thickness and lamination guide are modified.

• 대한기계학회논문집A
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• 제41권6호
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• pp.443-453
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• 2017

반도체 플립칩 패키지에서 구리기둥 범프 기술은 미세 피치 및 높은 I/O 밀도로 인해 기존의 솔더 범프 접합 기술을 대체하는 중이다. 그러나 구리기둥 범프는 리플로우 접합 공정 사용 시, 구리 범프의 높은 강성으로 인해 패키지에 높은 응력을 초래한다. 따라서 최근에 플립칩 공정에서 발생하는 패키지의 높은 응력 및 휨을 감소시키기 위해 열압착 공정 기술이 시도되고 있다. 본 연구에서는 플립칩 패키지의 열압착 공정과 리플로우 공정에서 발생하는 휨에 대해 수치해석을 이용하여 분석하였다. 패키지의 휨 최소화를 위한 본딩 공정 조건 최적화를 위해 본딩 툴 및 스테이지의 온도, 본딩 압력에 대한 휨 영향을 검토하였다. 또한 칩과 기판의 면적 및 두께가 패키지의 휨에 주는 영향을 분석하였다. 이를 통해, 향후 미세피치 접합부 형성 시 휨 및 응력을 최소화하기 위한 가이드라인을 제시하고자 하였다.

• 한국표면공학회지
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• 제45권6호
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• pp.248-256
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• 2012

A Pd-based hydrogen membranes for hydrogen purification and separation need high hydrogen perm-selectivity. The surface roughness of the support is important to coat the pinholes free and thin-film membrane over it. Also, The pinholes drastically decreased the hydrogen perm-selectivity of the Pd-based composite membrane. In order to remove the pinholes, we introduced various surface pre-treatment such as alumina powder packing, nickel electro-plating and micro-polishing pre-treatment. Especially, the micro-polishing pretreatment was very effective in roughness leveling off the surface of the porous nickel support, and it almost completely plugged the pores. Fine Ni particles filled surface pinholes with could form open structure at the interface of Pd alloy coating and Ni support by their diffusion to the membrane and resintering. In this study, a $4{\mu}m$ surface pore-free Pd-Cu-Ni ternary alloy membrane on a porous nickel substrate was successfully prepared by micro-polishing, high temperature sputtering and Cu-reflow process. And $H_2$ permeation and $N_2$ leak tests showed that the Pd-Cu-Ni ternary alloy hydrogen membrane achieved both high permeability of $13.2ml{\cdot}cm^{-2}{\cdot}min^{-1}{\cdot}atm^{-1}$ permation flux and infinite selectivity.

• 한국재료학회지
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• 제10권12호
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• pp.799-806
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• 2000

63Sn-37Pb에 Cu$_{6}$Sn$_{5}$를 분산시킨 760$\mu\textrm{m}$크기의 솔더범프를 Au(0.5$\mu\textrm{m}$)/Ni(5$\mu\textrm{m}$)/Cu(27$\pm$20$\mu\textrm{m}$) BGA 기판에 스크린)/Ni(5im)/Cu(27:201m) B3GA 기판에 스크린 프린팅법으로 제조하여, 리플로우 피크온도 유지시간, 15$0^{\circ}C$ 시효처리 시간에 따른 전단강도를 분석하였다. Cu$_{6}$Sn$_{5}$를 첨가한 솔더범프는 피크온도에서 30초간 유지시에는 63Sn-37Pb 솔더범프보다 높은 전단강도를 나타내었으나, 피크온도 유지시간을 60초 이상으로 증가시킴에 따라 전단강도가 63Sn-37Pb 솔더범프보다 저하하였다. 전단시험 후 솔더범프의 파단면은 초기에 전단 균열의 점진적인 전파에 의해 발생된 파괴부위와 점진적 균열전파에 의한 면적 감소로 솔더범프가 급격히 떨어져 나가면서 발생한 파괴부위로 구분할 수 있었다 피크온도 유지시간, 15$0^{\circ}C$ 시효처리 시간 및 Cu$_{6}$Sn$_{5}$ 첨가량에 무관하게 점진적 파괴모드에 의한 균열 전파길이가 증가할수록 솔더범프의 전단강도가 감소하였다.감소하였다.

• 한국표면공학회지
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• 제32권6호
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• pp.647-657
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• 1999

Due to the inherently poor adhesion strength of Cu-based leadframe/EMC (Epoxy Molding Compound) interface, popcorn cracking of thin plastic packages frequently occurs during the solder reflow process. In the present work, in order to enhance the adhesion strength of Cu-based leadframe/EMC interface, black-oxide layer was formed on the leadframe surface by chemical oxidation of leadframe, and then oxidized leadframe sheets were molded with EMC and machined to form SDCB (Sandwiched Double-Cantilever Beam) and SBN (Sandwiched Brazil-Nut) specimens. SDCB and SBN specimens were designed to measure the adhesion strength between leadframe and EMC in terms of critical energy-release rate under quasi-Mode I ($G_{IC}$ ) and mixed Mode loading ($G_{C}$ /) conditions, respectively. Results showed that black-oxide treatment of Cu-based leadframe initially introduced pebble-like X$C_2$O crystals with smooth facets on its surface, and after the full growth of $Cu_2$O layer, acicular CuO crystals were formed atop of the $Cu_2$O layer. According to the result of SDCB test, $Cu_2$O crystals on the leadframe surface did not increase ($G_{IC}$), however, acicular CuO crystals on the $Cu_2$O layer enhanced $G_{IC}$ considerably. The main reason for the adhesion improvement seems to be associated with the adhesion of CuO to EMC by mechanical interlocking mechanism. On the other hand, as the Mode II component increased, $G_{C}$ was increased, and when the phase angle was -34$^{\circ}$, crack Kinking into EMC was occured.d.

• Journal of Welding and Joining
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• 제20권5호
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• pp.72-77
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• 2002

Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of microelectronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder b01p and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.

• 대한금속재료학회지
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• 제48권6호
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• pp.557-564
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• 2010

Formation of Sn through-silicon-via (TSV) and its interconnection processes were studied in order to form a three-dimensional interconnection structure of chip-stack packages. Different from the conventional formation of Cu TSVs, which require a complicated Cu electroplating process, Sn TSVs can be formed easily by Sn electroplating and reflow. Sn via-filling behavior did not depend on the shape of the Sn electroplated layer, allowing a much wider process window for the formation of Sn TSVs compared to the conventional Cu TSV process. Interlocking joints were processed by intercalation of Cu bumps into Sn vias to form interconnections between chips with Sn TSVs, and the mechanical integrity of the interlocking joints was evaluated with a die shear test.