• Title/Summary/Keyword: Circuit Parameter

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The New Active Voltage Clamp ZVS-PWM Resonant High-frequency Inverter (새로운 액티브 전압 클램프 ZVS-PWM 공진 고주파 인버터)

  • Ahn, Yong-Wie;Kim, Hong-Shin;Mun, Sang-Pil;Woo, Kyung-Il;Park, Han-Seok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.66 no.4
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    • pp.188-193
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    • 2017
  • In this paper, a ZVS-PWM high-frequency inverter with a PWM control function is applied to commercial system 220[Vrms], and a resonator type ZVS-PWM high-frequency inverter circuit with a fixed-two methods were proposed. The parameters of the transformer model equivalent circuit of a copier fixing device, which is an essential element in the parameter optimization of the proposed circuit, are obtained by using a high-frequency amplifier and its frequency characteristics are described. The proposed method compared to the existing single-ended ZVS-PFM high frequency inverter can suppress the voltage and current peak value of the power semiconductor switching device and reduce the switching loss. The efficiency of the proposed method itself is 98[%] at rated power output. Also, the efficiency of 96[%] can be obtained even at low output, so that the proposed high frequency inverter is very efficient inverter. The total efficiency from the commercial AC input to the inverter output is 93[%] at rated, which is considered efficient for use in copying machines. In addition, the diode bridge loss accounts for the largest portion of the overall system efficiency distribution. On the other hand, the nonparallel filter has a very low loss.

Silicon Substrate Coupling Modeling and Analysis including RF Package Inductance (RF 패키지 인덕턴스가 실리콘 기판 커플링에 미치는 영향 모델링 및 해석)

  • Jin, U-Jin;Eo, Yeong-Seon;Sim, Jong-Jin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.1
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    • pp.49-57
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    • 2002
  • Including RF Package inductance, substrate coupling through conductive silicon(Si)-substrate is modeled and quantitatively characterized. 2-port substrate coupling model is extended for the characterization of multi-port substrate coupling between digital circuit block and analog/RF circuit block. Furthermore, scalable parameter extraction model is developed. Multi-port substrate coupling can be investigated by linearly superposing a frequency-dependent 2-port substrate coupling model using scalable parameters. In addition, Substrate coupling including RF package inductance effect is quantitatively investigated. It is shown that package effect increases substrate coupling and shifts a characteristic frequencies(i.e., poles) to the higher frequency range. The proposed methodology can be efficiently used to the mixed-signal circuit performance verification.

Synchronous Buck Converter with High Efficiency and Low Ripple Voltage for Mobile Applications (고 효율 저 리플 전압 특성을 갖는 모바일용 동기 형 벅 컨버터)

  • Yim, Chang-Jong;Kim, Jun-Sik;Park, Shi-Hong
    • Journal of IKEEE
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    • v.15 no.4
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    • pp.319-323
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    • 2011
  • In this paper presents a new model of dual-mode synchronous buck converter with dynamic control for mobile applications was proposed. The proposed circuit can operate at 2.5MHz with supply voltage 2.5V to 5V for low ripple and minimum inductor and capacitor size, which is suitable for single-cell lithium-ion battery supply mobile applications. For high efficiency, the proposed circuit adopts synchronous type and dynamic control. The proposed circuit is designed by using the device parameter of TSMC 0.18um BCD process and the performance is evaluated by Cadence spectre. Experimental board level results show the maximum conversion efficiency is 96% at 100mA load current.

A Study on Characteristics Analysis of Time Sharing Type High Frequency Inverter Consisting of Three Unit Half-Bridge Serial Resonant Inverter (Half-Bridge 직렬 공진형 인버터를 단위인버터로 한 시분할방식 고주파 인버터의 특성해석에 관한 연구)

  • 조규판;원재선;서철식;배영호;김동희;노채균
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.15 no.1
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    • pp.90-97
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    • 2001
  • A high frequency resonant inverter consisting of iliree unit Half-Bridge serial resommt inverter used as power source of induction heatmg at high frequency is presented in this paper. As a output [Dwer control strategy, sequencial time-sharing gate contml methcd is applied. This methcd is TDM(Time Division Multiplexing), which is broadly used with digital and analog signals transmission in communication system 1be analysis of the proposed circuit is generally described by using the normalized pararmenters. Also, the principle of basic operating and the its characteristics are estimated by the parameters such as switching frequency, load resistance. Also, according to the calculated characteristics value, a method of the circuit design and operating characteristics of the inverter is proposed. This paper proves the validity of theoretical analysis through the Pspice. This proposed inverter show that it can be practically used in future as power source system for induction heating application, DC-DC converter etc. r etc.

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Electrical Characteristics of Copper Circuit using Inkjet Printing (잉크젯 프린팅 방식으로 형성된 구리 배선의 전기적 특성 평가)

  • Kim, Kwang-Seok;Koo, Ja-Myeong;Joung, Jae-Woo;Kim, Byung-Sung;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.3
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    • pp.43-49
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    • 2010
  • Direct printing technology is an attractive metallization method, which has become immerging as "Green technology" to the conventional photolithography, on account of low cost, simple process and environment-friendliness. In order to commercialize the printed electronics in industry, it is essential to evaluate the electrical properties of conductive circuits using direct printing technology. In this contribution, we focused on the electrical characteristics of inkjet-printed circuits. A Cu nanoink was inkjet-printed onto a Bisaleimide triazine(BT) substrate with parallel transmission line(PTL) and coplanar waveguide(CPW) type, then was sintered at $250^{\circ}C$ for 30 min. We calculated the resistivity of printed circuits through direct current resistance by the measurement of I-V curve: the resistivity was approximately 0.558 ${\mu}{\Omega}{\cdot}cm$ which is about 3.3 times that of bulk Cu. Cascade's probe system in the frequency range from 0 to 30 GHz were employed to measure the Scattering parameter(S-parameter) with or without a gap between the substrate and the probe station chuck. The result of measured S-parameter showed that all printed circuits had over 5 dB of return loss in the entire frequency range. In the curve of insertion loss, $S_{21}$, showed that the PTL type circuits had better transmission of radio frequency (RF) than CPW type.

A Study on the Parameters of Design for Warpage reduction of Passive components Embedded Substrate for PoP (PoP용 패시브 소자 임베디드 기판의 warpage 감소를 위한 파라메타 설계에 관한 연구)

  • Cho, Seunghyun;Kim, Dohan;Oh, Youngjin;Lee, Jongtae;Cha, Sangsuk
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.1
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    • pp.75-81
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    • 2015
  • In this paper, numerical analysis by finite element method and parameter design by the Taguchi method were used to reduce warpage of a two passive components embedded double side substrate for PoP(Package on Package). The effect of thickness of circuit layers (L1, L2) and thickness of solder resist (SR_top, SR_BTM) were analyzed with 4 variations and 3 levels(minimum, average and maximum thickness) to find optimized thickness conditions. Also, paste effect of solder resist on unit area of top surface was analyzed. Finally, experiments was carried out to prove numerical analysis and the Taguchi method. Based on the numerical and experimental results, it was known that circuit layer in ball side of substrate was the most severe determining deviation for reducing warpage. Buried circuit layer in chip side, solder resist and were insignificant effects on warpage relatively. However, warpage decreased as circuit layer in ball side thickness increased but effect of solder resist and circuit layer in chip side thickness were conversely.

Implementation of Front End Module for 2.4GHz WLAN Band (2.4GHz 무선랜 대역을 위한 Front End Module 구현)

  • Lee, Yun-Sang;Ryu, Jong-In;Kim, Dong-Su;Kim, Jun-Chul;Park, Jong-Dae;Kang, Nam-Kee
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.1
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    • pp.19-25
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    • 2008
  • In this paper, the front end module (FEM) was proposed for 2.4GHz WLAN band by LTCC multilayer application. The FEM was composed of power amplifier IC, switch IC, and LTCC module. LTCC module consists of output matching circuit and lowpass filter as Tx part, bandpass filter as Rx part. Design of output matching circuit for LTCC was used matching parameter from output matching circuit based on lumped circuit on the PCB board. The dielectric constant of LTCC substrate is 9. The substrate was composed of total 26 layers with each 30um thickness. Ag paste was used for the internal pattern as the conductor material. The size of the module is $4.5mm{\times}3.2mm{\times}1.4mm$. The fabricated FEM showed the gain of 21dB, ACPR of less than -31dBc first side lobe and Less than -59dBc second side lobe and the output power of 23Bm at P1dB.

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Design of a CCM/DCM dual mode DC-DC Buck Converter with Capacitor Multiplier (커패시터 멀티플라이어를 갖는 CCM/DCM 이중모드 DC-DC 벅 컨버터의 설계)

  • Choi, Jin-Woong;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.9
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    • pp.21-26
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    • 2016
  • This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

The analysis of film flow around rotating roller partially immersed in ink (잉크에 부분적으로 잠겨 회전하는 롤 주위의 액막 유동 해석)

  • Yu, Seung-Hwan;Kang, Soo-Jin;Lee, Kwan-Soo
    • Proceedings of the KSME Conference
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    • 2007.05b
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    • pp.2279-2284
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    • 2007
  • This study is intended to analyze the effect of thin ink-film thickness around rotating printing roll on the printing quality in the gravure printing process which is used for making electronics circuit like a RFID tag with a conductive ink. The present work numerically estimates the film thickness around rotating roller partially immersed in ink, for which the volume of fluid (VOF) method was adopted to figure out the film formation process around rotating roller. Parameter studies were performed to compare the effect of ink viscosity, surface tension, roller rotating speed, immersed angle on the film thickness. The result indicates that the film thickness has a strong dependency on the fluid viscosity, while the surface tension has negligible effect.

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Shape Design Optimization of Disk Seal in $SF_6$ Gas Safety Valve ($SF_6$ 가스 안전밸브 디스크 시일의 최적설계에 관한 연구)

  • 김청균;조승현
    • Tribology and Lubricants
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    • v.20 no.5
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    • pp.231-236
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    • 2004
  • Sulfur Hexafluoride, S $F_{6}$ is widely used for leak detection and as a gaseous dielectric in transformers, condensers and circuit breakers. S $F_{6}$ gas is also effective as a cleanser in the semiconductor industry. This paper presents a numerical study of the sealing force of disk type seal in S $F_{6}$ gas safety valve. The sealing force on the disk seal is analyzed by the FEM method based on the Taguch's experimental design technique. Disk seals in S $F_{6}$ gas safety valve are designed with 9 design models based on 3 different contact length, compressive ratio and gas pressure. The calculated results of Cauchy stress and strain showed that the sealing characteristics of Teflon $^{ }$PTFE is more effective compared to that of FKM(Viton), which is related to the stiffness of the materials. And also, the contact length of the disk seal is important design parameter for sealing the S $F_{6}$ gas leakage in the safety valve.afety valve.