• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.9 no.4
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• pp.497-503
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• 1997

In the present study, the cooling package using the heat pipe has been developed to improve the thermal performance in the point of cooling characteristics of the electronic chip placed to the subrack being readily assembled and disassembled in ATM switching system. As the preliminary experiments, the cooling performances between a conventional way using a cooling fin and a proposed method applying the heat pipe are compared and analyzed. The cooling performance at a simulated electronic component packaging a heat pipe module is approximately achieved up to $5.0W/cm^2$ heat flux and the allowable temperature at the heated chip is sustained in the range within $70^{\circ}C$. From the results, it is confirmed that temperature oscillations are also settled by inserted wick in the evaporator section. From the user's viewpoint, the method to assemble and disassemble the heat pipe easily has been devised.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.39-46
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• 2003

Sn-Cu eutectic solder bump was fabricated by electroplating for flip chip and its characteristics were studied. A Si-wafer was used as a substrate and the UBM(Under Bump Metallization) of Al(400 nm)/Cu(300 nm)/Ni(400 nm)/Au(20 nm) was coated sequentially from the substrate to the top by an electron beam evaporator. The experimental results showed that the plating ratio of the Sn-Cu increased from 0.25 to 2.7 $\mu\textrm{m}$/min with the current density of 1 to 8 A/d$\m^2$. In this range of current density the plated Sn-Cu maintains its composition nearly constant level as Sn-0.9∼1.4 wt%/Cu. The solder bump of typical mushroom shape with its stem diameter of 120 $\mu\textrm{m}$ was formed through plating at 5 A/d$\m^2$ for 2 hrs. The mushroom bump changed its shape to the spherical type of 140 $\mu\textrm{m}$ diameter by air reflow at $260^{\circ}C$. The homogeneity of chemical composition for the solder bump was examined, and Sn content in the mushroom bump appears to be uneven. However, the Sn distributed more uniformly through an air reflow.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.95-100
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• 2010

LED (Light Emitting Diode) is 85% of the applied energy is converted into heat that is already well known. Lately, LED chips increasing the capacity as result delivered to increase the heat of the LED products and module that directly related to life span and degradation. Thus, in industry the high-power LED chip to control the heat generated during the course of the study and the existing aluminum, copper adhesives, and uses MLC (Metal clad laminate) structures using low-cost FR4 and copper CCL (Copper Clad Laminate) to reduce costs by changing to a study being carried out. In this study, using low-cost CCL Class, mounted 1W LED chip to analyze changes in the thermal resistance. In addition, heat dissipation in the CCL to facilitate a variety of thermal via design outside of the heat generated by the LED chip to control and facilitate the optimal structure of the heat dissipation is suggested.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.2
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• pp.31-43
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• 2019

In this study, polymer elastic bumps were fabricated for the flexible electronic package flip chip bonding and the viscoelastic and viscoplastic behavior of the polymer elastic bumps according to the temperature and load were analyzed using FEM and experiments. The polymer elastic bump is easy to deform by the bonding load, and it is confirmed that the bump height flatness problem is easily compensated and the stress concentration on thin chip is reduced remarkably. We also develop a spiral cap type and spoke cap type polymer elastic bump of $200{\mu}m$ diameter to complement Au metal cap crack phenomenon caused by excessive deformation of polymer elastic bump. The proposed polymer elastic bumps could reduce stress of metal wiring during bump deformation compared to metal cap bump, which is completely covered with metal wiring because the metal wiring on these bumps is partially patterned and easily deformable pattern. The spoke cap bump shows the lowest stress concentration in the metal wiring while maintaining the low contact resistance because the contact area between bump and pad was wider than that of the spiral cap bump.

• Smart Media Journal
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• v.11 no.9
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• pp.21-29
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• 2022

Ultra Violet(UV) is gradually being replaced with LED instead of general UV lamps. However, the light efficiency of UV LED is still lower than that of the general lamp, and the light efficiency is also low. Due to the current environment and technical problems of UV lamps, the LED replacements are gradually being made. In this study, a new package design and analysis were performed to increase the lifetime and performance of UV LEDs. A new packaging for UV LED were designed and implemented. The new packaging for UV LED was constructed to improve light efficiency. And the electrical and optical characteristics were analyzed respectively. To improve the optical efficiency in UV LED package, the Al has been used based on high reflectivity and applying the optimal lens focusing. Compared to the existing silver Ag, the light efficiency was improved by about 30% or more, and it was confirmed that the light output degradation characteristic was improved by about 10% in the newly applied optical device chip.

• Journal of Advanced Marine Engineering and Technology
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• v.37 no.4
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• pp.351-357
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• 2013

In flip chip packaging, underfill process is used to fill epoxy bonder into the gap between a chip and a substrate in order to improve the reliability of electronic devices. Underfill process by capillary motion can give rise to unwanted air void formations since the arrangement of solder bumps affects the interfacial dynamics of flow meniscus. In this paper, the unsteady flows in the capillary underfill process are visualized and then the racing effect and merging of the meniscus are investigated according to the arrangement of solder bumps. The result is shown that at higher bump density, the fluid flow perpendicular to the main direction of flow becomes stronger so that more air voids are formed. This phenomenon is more conspicuous at a staggered bump array than at a rectangular bump array.

• Corrosion Science and Technology
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• v.6 no.6
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• pp.282-285
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• 2007

Smaller size and higher integration of electronic systems make narrower interconnect pitch not only in chip-level but also in package-level. Moreover electronic systems are required to operate in harsher conditions, that is, higher current / voltage, elevated temperature / humidity, and complex chemical contaminants. Under these severe circumstances, electronic components respond to applied voltages by electrochemically ionization of metals and conducting filament forms between anode and cathode across a nonmetallic medium. This phenomenon is called as the electrochemical migration. Many kinds of metal (Cu, Ag, SnPb, Sn etc) using in electronic packages are failed by ECM. Eutectic SnPb which is used in various electronic packaging structures, that is, printed circuit boards, plastic-encapsulated packages, organic display panels, and tape chip carriers, chip-on-films etc. And the material for soldering (eutectic SnPb) using in electronic package easily makes insulation failure by ECM. In real PCB system, not only metals but also many chemical species are included. And these chemical species act as resources of contamination. Model test systems were developed to characterize the migration phenomena without contamination effect. The serpentine-shape pattern was developed for analyzing relationship of applied voltage bias and failure lifetime by the temperature / humidity biased(THB) test.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.6
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• pp.2624-2630
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• 2013

In LED chip packaging, die bonding is a very important process which fixes the LED chip on the lead flame to provide enough strength for the next process. During the process, inspection processes are very important to detect exact locations of dispensed epoxy dots and to determine bonding status of dies whether they are lies at exact positions with sufficient bonding strength. In this study, a useful machine vision based inspection system is proposed for the LED die bonder. In the proposed system, 2 cameras are used for epoxy dot position detection and 2 cameras are sued for die attaching status determination. New vision processing algorithm is proposed, and its efficiency is verified through required field experiments. Measured position error is less than $X:-29{\mu}m$, $Y:-32{\mu}m$ and rotation error:$3^{\circ}$ using proposed vision algorithm. It is concluded that the proposed machine vision based inspection system can be successfully implemented on the developed die bonding system.

• Korean Journal of Metals and Materials
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• v.48 no.7
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• pp.667-673
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• 2010

Copper filling into TSV (through-silicon-via) and reduction of the filling time for the three dimensional chip stacking were investigated in this study. A Si wafer with straight vias - $30\;{\mu}m$ in diameter and $60\;{\mu}m$ in depth with $200\;{\mu}m$ pitch - where the vias were drilled by DRIE (Deep Reactive Ion Etching) process, was prepared as a substrate. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to reduce the time required complete the Cu filling into the TSV, the PPR (periodic pulse reverse) wave current was applied to the cathode of a Si chip during electroplating, and the PR (pulse-reverse) wave current was also applied for a comparison. The experimental results showed 100% filling rate into the TSV in one hour was achieved by the PPR electroplating process. At the interface between the Cu filling and Ti/ Au functional layers, no defect, such as a void, was found. Meanwhile, the electroplating by the PR current showed maximum 43% filling ratio into the TSV in an hour. The applied PPR wave form was confirmed to be effective to fill the TSV in a short time.

• Korean Journal of Metals and Materials
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• v.49 no.5
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• pp.411-418
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• 2011

The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.