• 전자공학회논문지C
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• 제34C권11호
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• pp.76-85
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• 1997

Charge-pump loop filter was designed using GaAs MESFET for GHz-range PLL system applications. Characteristics of charge-pump loop filter and stability of charge-pump PLL, system were analyzed. Performance specifications were defined and a charge-pump loop filter was designed that satisfies these specifications.

• 한국통신학회논문지
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• 제21권12호
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• pp.3069-3085
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• 1996

This paper shows an accurate charge-pump PLL model which considers the wave-form distortion in high speed operation of charge-pump PLL, the leakage current in loop filter, and a physical limit in charge-pump. With proposed model of charge-pump PLL, overload and stability are derived theoretically and the results are compared to the conventional model. Unlike the ideal charge-pump PLL that simplifies calculations, it is possible to analyze the transient-state and the steady-state at the same time with proposed accurate model. Thus, charge-pump over load, in the transient-state and the stead-state of charge-pump, is accuragely analyzed and the results are confirmed with simulation.

• 한국정보통신학회논문지
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• 제2권2호
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• pp.267-273
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• 1998

본 논문에서는 charge pump 회로를 차동 전류 스위치 구조를 갖는 회로를 사용하여 설계하였다. charge pump 회로의 스위칭 속도를 향상시키기 위하여 CMOS 보다 스위칭 속도가 빠른 MESFET를 이용하여 회로를 설계하였다. 차동 전류 스위치 구조의 charge pump회로가 고주파수 대역에서 동작하는데 따른 회로의 성능 및 안정성 문제를 제시하고 분석하였다. 또한 charge pump 회로의 성능을 평가하기 위한 척도를 세부적으로 정의함으로써 charge pump의 성능을 표현하게 된다. 설계된 회로는 HSPICE 시뮬레이터를 사용하여 시뮬레이션 하였으며, 시뮬레이션 결과 본 논문에서 제시한 구조가 1GHz급의 charge pump 회로로 설계가 가능하다는 것을 알 수 있었다.

• 대한전자공학회논문지SD
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• 제45권5호
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• pp.50-57
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• 2008

본 논문에서는 CMOS image sensor(CIS)에서 사용될 수 있는 고 효율 charge pump를 제안하였다. 제안된 charge pump는 CIS의 동작 특성을 활용하여 switching loss 및 reversion loss를 최소화하여 고 효율 동작을 실현하였다. 즉, CIS 픽셀 동작 구간에 따라 local clock driver, 펌핑 커패시터, 그리고 charge 전달 switch의 크기를 역동적으로 조절함으로써 switching loss 를 최소화하였다. 또한, schmitt trigger를 채용한 tri-state local clock driver를 이용하여 non-overlapping 구간이 충분히 확보된 local clock을 공급할 수 있게 함으로써 reversion loss를 최소화하였다. 0.13-um CMOS 공정을 이용한 시뮬레이션 비교 결과, 제안된 charge pump는 구동 전류가 없는 조건에서 기존 구조에 비해 최대 49.1% 전력 소모를 개선하였으며, 구동 전류가 최대인 조건에서는 19.0% 전력 소모를 개선할 수 있었음을 확인하였다.

• 센서학회지
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• 제12권1호
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• pp.51-56
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• 2003

We describe a charge pump circuit using VCO (voltage controlled oscillator) for storing information into local memories in neural networks. The VCO is used for adjusting the output voltage of the charge pump to the reference voltage and for reducing the fluctuation generated by the clocking scheme. The charge pump circuit is simulated by using Hynix 0.35um CMOS process parameters. The proposed charge pump operates properly regardless to the temperature and the supply voltage variation.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.469-471
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• 2008

전하 펌프는 위상 고정 루프의 성능에 영향을 준다. 전하 펌프 설계에 있어서 전류 부정합, 전하 공유, 전하 주입, 누설 전류 등을 고려할 필요가 있다. 본 논문에서는 기존의 고속 전하 펌프의 전류 정합성을 개선한 새로운 전하 펌프 회로를 제안하였다. 전류 부정합을 줄이기 위해 주로 사용되는 간단한 방법으로는 캐스코드를 이용하여 전하 펌프의 출력 저항을 증가시키는 방법이 있다. 그러나 캐스코드 방법을 사용하면 전하펌프의 출력 범위에 제약을 받게 되므로 전원 전압이 낮아짐에 따라 적용하기가 힘들어진다는 단점이 있다. 따라서 본 논문에서는 캐스코드를 적용하지 않고 연산증폭기를 사용하여 전하펌프의 출력 범위 전체에서 우수한 전류 정합 특성을 갖는 회로를 제안하였다.

• 전기학회논문지
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• 제59권2호
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• pp.465-470
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• 2010

The charge pump in a phase-locked loop is a key block in determining reference spurs of the VCO output signal. To reduce reference spurs, the current mismatch in the charge pump must be minimized. This paper presents a dual compensation method to reduce the current mismatch. The proposed charge pump and PLL were realized in a $0.18{\mu}m$ CMOS process. Measured current matching characteristics were achieved with less than 1.4% difference and with the current variation of 3.8% in the pump current over the charge pump output voltage range of 0.35-1.35V at 1.8V. The reference spur of the PLL based on the proposed charge pump was measured to be -71dBc.

• 전자공학회논문지S
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• 제35S권1호
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• pp.14-22
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• 1998

The Mathematic model of bit synchronization charge-pump Phase Locked Loop (PLL) is presented which takes into account the aperiodic reference pulses and the leakage current of the loop filter. We derive theoreitcal static phase error, overload and stability of bit synchronization charge-pump PLL using presented model and compare it with one of the conventional charge-pump PLL model. We can analysis bit synchronization charge-pump PLL exactly because our model takes into account the leakage current of the loop filter and aperiodic input data which are the charateristics of bit synchronization charge-pump PLL. We also verify it using HSPICE simulation with a bity synchronizer circuit.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.873-879
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• 2016

A charge pump circuit with very short turn-on time is presented for minimizing reference spurs in CMOS PLL frequency synthesizers. In the source switching charge pump circuit, applying proper voltages to the source nodes of the current source FETs can significantly reduce the unwanted glitch at the output current while not degrading the rising time, thus resulting in low spur at the synthesizer output spectrum. A 1.1-1.6 GHz PLL synthesizer employing the proposed charge pump circuit is fabricated in 65 nm CMOS. The current consumption of the charge pump is $490{\mu}A$ from 1 V supply. Compared to the conventional charge pump, it is shown that the reference spur is improved by dB through minimizing the turn-on time. Theoretical analysis is described to show that the measured results agree well with the theory.

• 한국지열·수열에너지학회논문집
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• 제11권1호
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• pp.15-20
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• 2015

In this study, the optimization and performance characteristics of a cascade heat pump system was analyzed with the variation of low stage refrigerant charge amount. The cascade heat pump was designed and constructed with R134a and R410A as the refrigerant for high stage and low stage cycle, respectively. Experiments were conducted by varying the low stage charge amount and the performance characteristics of the cascade heat pump were studied. The refrigerant charge amount of the low stage cycle was varied between the ranges of -15% and +10% of the optimum charge amount. The performance variation experienced in the cascade heat pump due to the variation of refrigerant charge amount shows greater effect in the undercharge regions than the overcharge regions. COP reduction in the undercharge region is larger than the decrease in the overcharge region. Some cycle variation such as power consumption and cycle pressure according to low stage refrigerant charge amount showed different trends comparing with those according to high stage refrrgerant charge amount. Therefore, the optimum charge amount of the cascade heat pump should be determined based on the experimental data obtained by the variation of high and low stage refrigerant charge amount.