• Current Photovoltaic Research
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• 제4권1호
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• pp.1-7
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• 2016

Among the various types of solar cells, silicon based two terminal tandem solar cell is one of the most popular one. It is designed to split the absorption of incident AM1.5 solar radiation among two of its component cells, thereby widening the wavelength range of external quantum efficiency (EQE) spectra of the device, in comparison to that of a single junction solar cell. In order to improve the EQE spectra further and raise short circuit current density ($J_{sc}$) an optimization of the tradeoff between the top and bottom cell is needed. In an optimized cell structure, the $J_{sc}$ and hence efficiency of the device can further be enhanced with the help of light trapping scheme. This can be achieved by texturing front and back surface as well as a back reflector of the device. In this brief review we highlight the development of light trapping in the silicon based tandem solar cell.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2011년도 춘계학술대회 논문집
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• pp.187-188
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• 2011

• Journal of the Optical Society of Korea
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• 제13권3호
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• pp.335-340
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• 2009

Ultrashort pulse laser drilling of polycarbonate track-etched membrane (pTEM) material was used to fabricate a mouse embryo cell trapping device. Holes with a diameter of $2{\mu}m$ to $5{\mu}m$ were fabricated on a $10{\mu}m$ thick membrane using a femtosecond laser with a 150 fs pulse width and 775 nm wavelength and multiple-pulse irradiation. In cell trapping tests, the overall cell occupancy of the machined holes in the fabricated pTEM was found to be more than 80%. The results of a single pulse and multiple pulse irradiation were compared in terms of the surface quality. It was generally found that a single pulse with high energy was less desirable than irradiation with multiple pulses of lower energy.

• Journal of Biosystems Engineering
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• 제41권1호
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• pp.60-65
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• 2016

Purpose: The necessity for precise manipulation of bioparticles has greatly increased in the fields of bioscience, biomedical, and environmental monitoring. Dielectrophoresis (DEP) is considered to be an ideal technique to manipulate bioparticles. The objective of this study is to develop a DEP microfluidic device that can trap fluorescent beads, which mimic bioparticles, at the low voltage and frequency of the sinusoidal signal supplied to the microfluidic device. Methods: A DEP microfluidic device, which is composed of polydimethylsiloxane (PDMS) channels and interdigitated electrode networks, is fabricated to trap fluorescent beads. The geometry of the interdigitated electrodes is determined through computational simulation. To determine the optimum voltage and frequency of the sinusoidal signal supplied to the device, the experiments of trapping beads are conducted at various combinations of voltage and frequency. The performance of the DEP microfluidic device is evaluated by investigating the correlation between fluorescent intensities and bead concentrations. Results: The optimum ratio of the widths between the negative and positive electrodes was 1:4 ($20:80{\mu}m$) at a gap of $20{\mu}m$ between the two electrodes. The DEP electrode networks were fabricated based on this geometry and used for the bead trapping experiments. The optimum voltage and frequency of the supplied signal for trapping fluorescent beads were 15 V and 5 kHz, respectively. The fluorescent intensity of the trapped beads increased linearly as the bead concentration increased. The coefficient of determination ($R^2$) between the fluorescent intensity and the bead concentration was 0.989. Conclusions: It is concluded that the microfluidic device developed in this study is promising for trapping bioparticles, such as a cell or virus, if they are conjugated to beads, and their concentration is quantified.

• Transactions on Electrical and Electronic Materials
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• 제17권5호
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• pp.275-279
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• 2016

This is a brief review on light trapping in Si based thin film solar cells with textured surfaces and transparent conducting oxide front electrodes. The light trapping scheme appears to be essential in improving device efficiency over 10%. As light absorption in a thin film solar cells is not sufficient, light trapping becomes necessary to be effectively implemented with a textured surface. Surface texturing helps in the light trapping, and thereby raises short circuit current density and its efficiency. Such a scheme can be adapted to single junction as well as tandem solar cell, amorphous or micro-crystalline devices. A tandem cell is expected to have superior performance in comparison to a single junction cell and random surface textures appears to be preferable to a periodic structures.

• Current Photovoltaic Research
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• 제4권3호
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• pp.119-123
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• 2016

We discussed various cover glass substrates available for photovoltaic (PV) modules, and investigated the fabrication methods of light trapping structures for the efficiency enhancement of PV modules: wet and dry etching or laser and direct patternings. We also introduced the analysis of haze at etched glass surfaces as a function of wavelength and also presented a anti-reflection coating technology for PV module.

• 반도체디스플레이기술학회지
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• 제18권4호
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• pp.138-142
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• 2019

As the NAND flash memory goes to 3D vertical Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) structure, the lateral charge migration can be critical in the reliability performance. Even more, with miniaturization of flash memory cell device, just a little movement of trapped charge can cause reliability problems. In this paper, we propose a method of predicting the trapped charge profile in the retention mode. Charge diffusivity in the charge trapping layer (Si₃N₄) was extracted experimentally, and the effect on the trapped charge profile was demonstrated by the simulation and experiment.

• 대한전자공학회논문지SD
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• 제45권7호
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• pp.37-43
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• 2008

본 논문에서는 전하 펌프 방법 (Charge Pumping Method, CPM)를 이용하여 서로 다른 질화막 층을 가지는 N-Channel SANOS (Silicon-$Al_2O_3$-Nitride-Oxide-Silicon) Flash Memory Cell 트랜지스터의 트랩 특성을 규명하였다. SANOS Flash Memory에서 계면 및 질화막 트랩의 중요성은 널리 알려져 있지만 소자에 직접 적용 가능하면서 정화하고 용이한 트랩 분석 방법은 미흡하다고 할 수 있다. 기존에 알려진 분석 방법 중 전하 펌프 방법은 측정 및 분석이 간단하면서 트랜지스터에 직접 적용이 가능하여 MOSFET에 널리 사용되어왔으며 최근에는 MONOS/SONOS 구조에도 적용되고 있지만 아직까지는 Silicon 기판과 tunneling oxide와의 계면에 존재하는 트랩 및 tunneling oxide가 얇은 구조에서의 질화막 벌크 트랩 추출 결과만이 보고되어 있다. 이에 본 연구에서는 Trapping Layer (질화막)가 다른 SONOS 트랜지스터에 전하 펌프 방법을 적용하여 Si 기판/Tunneling Oxide 계면 트랩 및 질화막 트랩을 분리하여 평가하였으며 추출된 결과의 정확성 및 유용성을 확인하고자 트랜지스터의 전기적 특성 및 메모리 특성과의 상관 관계를 분석하고 Simulation을 통해 확인하였다. 분석 결과 계면 트랩의 경우 트랩 밀도가 높고 trap의 capture cross section이 큰 소자의 경우 전자이동도, subthreshold slop, leakage current 등의 트랜지스터의 일반적인 특성 열화가 나타났다. 계면 트랩은 특히 Memory 특성 중 Program/Erase (P/E) speed에 영향을 미치는 것으로 나타났는데 이는 계면결함이 많은 소자의 경우 같은 P/E 조건에서 더 많은 전하가 계면결함에 포획됨으로써 trapping layer로의 carrier 이동이 억제되기 때문으로 판단되며 simulation을 통해서도 동일한 결과를 확인하였다. 하지만 data retention의 경우 계면 트랩보다 charge trapping layer인 질화막 트랩 특성에 의해 더 크게 영향을 받는 것으로 나타났다. 이는 P/E cycling 횟수에 따른 data retention 특성 열화 측정 결과에서도 일관되게 확인할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.56-56
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• 2009

In this study, we fabricated the engineered $SiO_2/Si_3N_4/SiO_2$(ONO) tunnel barrier with high-k $HfO_2$ trapping layer for application high performance flash MLC(Multi Level Cell). As a result, memory device show low operation voltage and stable memory characteristics with large memory window. Therefore, the engineered tunnel barrier with ONO stacks were useful structure would be effective method for high-integrated MLC memory applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.94-95
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• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.