• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.8
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• pp.350-354
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• 2005

This paper proposes a new method for delay time calculation in RLC interconnects. This method is simple, but precise. The proposed method can calculate delay time of RLC interconnects by simple numerical formula calculation without complex moment calculation using reduced model in RLC interconnects. The results using the proposed method for RLC circuits show that average relative error is within $10\%$ in comparison with HSPICE simulation results.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.8
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• pp.632-639
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• 2003

This paper proposes a simple compensation scheme for the time delay caused by measurement, calculation and selection of voltage vector in Direct Torque Control (DTC) of an induction motor. In general scheme, it is difficult to know the exact delay time, furthermore the delay time can be varied by program routines for calculation and processing of measured data. In this proposed scheme, by applying voltage vector at the beginning of next sampling period, a fixed delay time is achieved and its compensation becomes much simpler. Furthermore, with the simple compensation algorithm, an improved performance can be achieved by shortening sampling period. Experimental results prove the feasibility of the proposed scheme in induction motor control.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.1-9
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• 1999

Timing-level circuit analyses are used to obtain fast and accurate results, and the analysis of gate and interconnect delay is necessary to validate the correctness of circuit design. This paper proposes an efficient algorithm which simultaneously calculates the gate delay and the transition time of linearized voltage source for subsequent interconnect delay calculation. The notion of effective capacitance is used to calculate the gate delay and the transition time of linearized voltage source which considers the on-resistance of driving gate. The procedure for obtaining the gate delay and the transition time of linearized voltage source has been developed through an iterative operation using the precharacterized data of gates. While previous methods require extra information for the transition time calculation of linearized voltage sources, our method uses the derived data during the gate delay calculation process, which does not require any change in the precharacterization process.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.4
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• pp.170-178
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• 2001

Deadbeat technique has been proposed as a digital controller for an UPS inverter to achieve the fast, response to a load variation and to conserve a very low THD under a nonlinear load condition. This scheme contains a fatal drawback, sensitivity against parameter variation and calculation time delay. This paper proposes a second order deadbeat controller, which fundamentally solves the calculation time delay problem and certainly guarantees the robustness of the parameter's variation. RLP(Repetitive Load Predictor) which predicts the load current ahead of two sampling time and FVR(Fundamental Voltage Regulator) which eliminates the fundamental errors of the output voltage are also proposed for the second order deadbeat controller to apply to UPS inverter systems. These are shown theoretically and practically through simulation and experiment.

• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.63-64
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• 2011

The inevitable calculation time delay of digital controller especially degrades the voltage control performance of three-phase UPS systems. This paper proposes time delay compensators based on the Smith-predictor for both voltage and current controllers of three-level NPC inverters. The PSIM-based simulation results show that the proposed controller with delay compensator gives improved voltage control performance with respect to time delay.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1056-1058
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• 2000

Deadbeat technique has been proposed as a digital controller for an UPS inverter to achieve the fast response to a load variation and to conserve a very low THD under a nonlinear load condition. This scheme contains a fatal drawback, sensitivity against parameter variation and calculation time delay. This paper proposes a second order deadbeat current controller, which fundamentally solves the calculation time delay problem and certainly guarantees the robustness of the parameter's variation. This is shown theoretically and practically through simulation and experiment.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.918-923
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• 1989

This paper presents a stability condition for Astrom's minimal variance control(MVC) with mismatch of time delay for a SISO ARMAX model containing time delay. The proof of the condition presented here is based on the characteristic equation in the feedback system and its magnitude. This condition, from easy numerical calculation, is able to find the stability of the feedback system without knowing the real time delay.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.7
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• pp.1-9
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• 1999

This paper presents an analytic 3rd order calculation methods, without simulations, for delay time of RC-class circuits which are conveniently used to on-chip interconnects. While the proposed method requires comparable evaluation time than the previous 2nd order calculation method, it ensures more accurate results than those of 2nd order method. The proposed analytic delay calculation method guarantees allowable error tolerances when compared to the results obtained from the AWE (Asymptotic Waveform Evaluation) technique and has better performance in evaluation time as well as numerical stability. The first algorithm of the proposed method requires 8 moments for the 3rd order approximation and yields more accurate delay time approximation. The second algorithm requires 6 moments for the 3rd order approximation and results in shorter evaluation time, the accuracy of which may be less than the first algorithm.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.51 no.4
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• pp.175-185
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• 2002

In this paper, a new fully digital current control method of UPS inverter, which is based on an internal model control, is proposed. In the proposed control system, overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The internal model controller is adopted to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. That is, the average current of filter capacitor is been exactly equal to the reference current with a time lag of two sampling intervals. Therefore, this method has an essentially overshoot free reference-to-output response with a minimum possible rise time. The effectiveness of the proposed control system has been verified by the simulation and experimental respectively. From the simulation and experimental results, the proposed system is achieved the robust characteristics to the calculation time delay and parameter variation as well as very fast dynamic performance, thus it can be effectively applied to the power supply for the critical load.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10C
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• pp.1370-1377
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• 2004

Optimal control gain for time-delay systems is made by an optimal control gain for delay-free systems multiplied by a state transition function for the delay time. The optimal control gain for delay-free systems is obtained by pushing two zeros of the PID controller closely to a larger pole of the second order plant. Thus the optimal tuning of PID controller for time-delay second order system is able to be obtained by calculation for the state transition function.