• Title/Summary/Keyword: CHIP

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A Dual-Level Knowledge-Based Synthesis System for Semiconductor Chip Encapsulation

  • Yong Jeong, Heo
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2003.12a
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    • pp.154-159
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    • 2003
  • Semiconductor chip encapsulation process is employed to protect the chip and to achieve optimal performance of the chip. Expert decision-making to obtain the appropriate package design or process conditions with high yields and high productivity is quite difficult. In this paper, an expert system for semiconductor chip encapsulation has been constructed which combines a knowledge-based system with CAE software.

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Realization of one chip for opto-couplers in driving circuit of electric valve (전동밸브의 구동회로에서 Opto-Coupler들의 one chip화 구현)

  • 정원채
    • Proceedings of the IEEK Conference
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    • 2001.06e
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    • pp.181-184
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    • 2001
  • This paper has been studied driving circuits in electrical valves. Also in this paper, opto-couplers of driving circuit are replaced with digital one chip of Altera company. Designs in order to realization of one chip are carried out with Altera Max Plus II. For compact size and light weight, the realization with one chip is necessary in the electrical valves. This paper has designed and presented the digital schemetic circuits, finally the driving circuits are sucessfully operated with the designed chip and showed the saving of area in the driving circuits of electric valves.

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ROM, RAM등의 on-chip化가 繼續되는 下位마이크로 컴퓨터

  • 송영재
    • The Magazine of the IEIE
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    • v.4 no.1
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    • pp.1-9
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    • 1977
  • 마이크로컴퓨터의 하위의 분야에서 ROM과 RAM등을 집적한 "1 chip마이크로컴퓨터 내지 1 chip microcontroller라고 불리우는 것이 몇 개 등장하고 있다. 작년 11월에 발표한 Intel사의 PROM실장의 1 chip 마이크로컴퓨터 MCS48은 이 움직임에 박차를 가하고 있다. 최근의 1 chip 마이크로컴퓨터의 기능과 기술적인 문제를 조사한 것이다.

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Design and Contact Force Control of a Flip Chip Mounting Head system

  • Kim, Kyoung-Jun;Shim, Jae-Hong
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1060-1065
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    • 2003
  • This paper contributes to development of a new chip mounting head system for flip chip. Recently, the LDM(Linear DC Motor) has been widely used, because it has particular merits than the rotary type motors. In this paper, we proposed a macro/micro positioning system for force control of a chip mounting system. In the proposed macro/micro system, the macro actuator provide the system with a gross motion while the micro device yields fine tuned motion to reduce the harmful impact force that occurs between very small sized electronic parts and PCB surface. In order to prove the effectiveness of the proposed macro/micro chip mounting system, we compared the proposed chip mounting head with the conventional chip mounting head equipped with a macro actuator only. A series of experiments were executed under the mounting conditions of various access velocities and PCB stiffness. As a result of this study, a satisfactory voice coil actuator as the micro actuator has been developed, and its performance meet well the specifications desired for the design of the chip mounting head system and show good correspondence between theoretical analysis and experimental results.

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A 512 Bit Mask Programmable ROM using PMOS Technology (PMOS 기술을 이용한 512 Bit Mask Programmable ROM의 설계 및 제작)

  • 신현종;김충기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.18 no.4
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    • pp.34-42
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    • 1981
  • A 512-bit Task Programmable ROM has been designed and fabricated using PMOS technology. The content of the memory was written through the gate pattern during the fabrication process, and was checked by displaying the output of the chip on an oscilloscope with 512(32$\times$16) matrix points. The operation of the chip was surcessful with operating voltage from -6V to -l2V, The power consumption and propagation delay time have been measured to be 3mW and 13 $\mu$sec, respectively at -6 Volt. The power consunption increased to 27mW and propagation delay time decreased to 3$\mu$sec at -12V. The output of the chip was capable of driving the input of a TTL gate directly and retained a high impedence state when the chip solect function disabled the output.

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Chip Breaking Characteristics Depending on Equivalent Effective Rake Angle in Turning (외경선삭가공시 등가유효경사각에 따른 칩절단 특성)

  • Lee, Young-Moon;Chang, Seung-Il;Sun, Jeong-Woo;Yun, Jong-Hoon
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.3 no.2
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    • pp.25-31
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    • 2004
  • Machinability in metal cutting processes depends on cutting input conditions such as cutting velocity, feed rate, depth of cut, types of work material and tool shape factors. In this study, to assess chip breaking characteristics of a turning process, an equivalent oblique cutting system to this has been established. And the equivalent effective rake angle was determined using side rake angle, back rake angle and side cutting edge angle of the tool. A non-dimensional parameter, Chip breaking index(CB), was used to assess Chip breaking characteristics of chip in conjunction with the equivalent effective rake angle. In case of positive rake angles of the equivalent effective rake, the back rake angle has little effect on the chip breaking characteristics however, in case of negative ones, the side rake angle has some effect on Chip breaking characteristics.

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Feasibility of Copper Powder Fabrication by Ball Milling of Copper Chip Scrap Occurred During Cutting Process of Copper Pipe (구리 관(管)의 절단(切斷) 공정(工程)중 발생한 구리칩 스크랩의 볼밀링에 의한 구리 분말(粉末) 제조(製造) 가능성(可能性))

  • Hong, Seong-Hyeon
    • Resources Recycling
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    • v.20 no.6
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    • pp.37-42
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    • 2011
  • Copper chip scrape has been occurred by cutting of copper pipe. The feasibility of copper chip scrape into the copper powder by milling was studied. Two milling type such as rod milling and horizontal balling milling were applied in this research. Copper chip can not fragmented into powder by using rod milling. In contrast to rod milling, copper chip can be changed into powder by horizontal ball milling for above 36 hours. It was found that recycling of copper chip scraps into copper powder by horizontal ball milling is possible and powder fraction percent ($75{\sim}150{\mu}m$) of milled copper chip for 48 hours is 25.3%.

Flexible and Embedded Packaging of Thinned Silicon Chip (초 박형 실리콘 칩을 이용한 유연 패키징 기술 및 집적 회로 삽입형 패키징 기술)

  • 이태희;신규호;김용준
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.1
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    • pp.29-36
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    • 2004
  • A flexible packaging scheme, which includes chip packaging, has been developed using a thinned silicon chip. Mechanical characteristics of thinned silicon chips are examined by bending tests and finite element analysis. Thinned silicon chips (t<30 $\mu\textrm{m}$) are fabricated by chemical etching process to avoid possible surface damages on them. And the chips are stacked directly on $Kapton^{Kapton}$film by thermal compressive bonding. The low height difference between the thinned silicon chip and $Kapton^{Kapton}$film allows electroplating for electrical interconnection method. Because the 'Chip' is embedded in the flexible substrate, higher packaging density and wearability can be achieved by maximized usable packaging area.

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Determination of stress state in formation zone by central slip-line field chip

  • Toropov Andrey;Ko Sung Lim
    • International Journal of Precision Engineering and Manufacturing
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    • v.6 no.3
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    • pp.24-28
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    • 2005
  • Stress state of chip formation zone is one of the main problems in metal cutting mechanics. In two-dimensional case this process is usually considered as consistent shears of work material along one of several shear surfaces, separating chip from workpiece. These shear planes are assumed to be trajectories of maximum shear stress forming corresponding slip-line field. This paper suggests a new approach to the constriction of slip-line field, which implies uniform compression in chip formation zone. Based on the given model it has been found that imaginary shear line in orthogonal cutting is close to the trajectory of maximum normal stress and the problem about its determination has been considered as well. It has been shown that there is a second central slip-line field inside chip, which corresponds well to experimental data about stress distribution on tool rake face and tool-chip contact length. The suggested model would be useful in understanding mechanistic problems in machining.