• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.7
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• pp.575-580
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• 2007

A 16 Mb 1T1C FeRAM device was integrated with BLT capacitors. But a lot of cells were failed randomly during the measuring the bit-line signal distribution of each cell. The reason was revealed that the grain size and orientation of the BLT thin film were severely non-uniform. And the grain size and orientation were severely affected by the process conditions of post heat treatment, especially nucleation step. The optimized annealing temperature at the nucleation step was $560^{\circ}C$. The microstructure of the BLT thin film was also varied by the annealing time at the step. The longer process time showed the finer grain size. Therefore, the uniformity of the grain size and orientation could be improved by changing the process conditions of the nucleation step. The FeRAM device without random bit-fail cell was successfully fabricated with the optimized BLT capacitor and the sensing margin in bit-line signal distribution of it was about 340 mV.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.192-193
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• 2006

A 16Mb ITIC FeRAM device was fabricated with BLT capacitors. The average value of the switchable 2 polarization obtained m the 32k-array (unit capacitor size: 068 ${mu}m^2$) capacitors was about 16 ${\mu}C/cm^2$ at 3V and the uniformity within an 8-inch wafer was about 2.8%. But a lot of cells were failed randomly during the measuring the bit-line signal of each cell. It was revealed that the Grain size and orientation of the BLT thin film were severely non-uniform. Therefore, the uniformity of the grain size and orientation was improved by changing the process conditions of post heat treatment. The temperature of nucleation step was the very effective on varying the microstructure of the BLT thin film. The optimized temperature of the nucleation step was $560^{\circ}C$.

• Korean Journal of Materials Research
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• v.14 no.10
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• pp.701-706
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• 2004

Bismuth layered structure ferroelectric thin films, La-substituted $Bi_{4}Ti_{3}O_{12}$ ($Bi_{1-x}La_{x}Ti_{3}O_{12}$, x=0.75, BLT) were prepared on the $Pt(111)/Ti/SiO_2/Si(100)$ substrates by a sol-gel spin coating process. The thin films were annealed in various conditions, i.e., oxygen, nitrogen and vacuum atmospheres for various annealing time. We investigated the annealing condition effects on the grain orientation and ferroelectric properties. The measured XRD patterns revealed that the BLT thin films showed only $Bi_{4}Ti_{3}O_{12}$-type phase with random orientation. $La^{3+}$ ion substitution for $Bi^{3+}$ ion in perovskite layers of $Bi_{4}Ti_{3}O_{12}$ decreased the degree of c-axis orientation and increased the remanent polarization ($2P_{r}$). The remanent polarization ($2P_{r}$) and the coercive field ($2E_{c}$) of the BLT thin film annealed at $650^{\circ}C$ for 5 min in oxygen atmosphere were $87{\mu}C/cm^2$ and 182 kV/cm, respectively, at an applied electric field of 240 kV/cm. For all of the BLT thin films annealed in various conditions, the fatigue resistance was shown. The improvement of ferroelectric properties with La substitution in $Bi_{4}Ti_{3}O_{12}$ could be attributed to the changes in space charge densities and grain orientation in the thin film.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.352-355
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• 2003

[ $Bi_{3.25}La_{0.75}Ti_3O_{12}$ ] (BLT) thin films were prepared by using metal organic decomposition method onto the LaNiO3 (LNO) bottom electrode. Both the structure and morphology of the films were analyzed by x-ray diffraction (XRD) and atomic force microscope (AFM). Even at low temperatures ranging from 450 to $650^{\circ}C$, the BLT thin films were successfully deposited on LNO bottom electrode and exhibited (117) orientation. The BLT thin films annealed as low as $600^{\circ}C$ showed excellent ferroelectricity, higher remanent polarization and no significant degradation of switching charge at least up to $5{\times}10^9$ switching cycles at a frequency of 100 kHz and 5 V. For the annealing temperature of $600^{\circ}C$, the remanent polarization $P_r$ and coercive field were $23.5\;{\mu}C/cm^2$ and 120 kV/cm, respectively.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2002.11a
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• pp.69-71
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• 2002

$(Bi, La)Ti_{3}O_{12}(BLT)$ ferroelectric thin films were prepared on $Al_{2}O_{3}/Si$ substrates by the sol-gel method. The as-coated films were post-annealed at the temperature of $650^{\circ}C$ and $700^{\circ}C$ for 30 min. The crystallinty, surface morphologies and electrical properties were affected by the annealing temperatures. The BLT films annealed at above $650^{\circ}C$ exhibited typical bismuth layered perovskite structures with (00$\ell$) preferred orientation. The granular shaped grains with a size of approximately 90nm was formed in the film sample annealed at $700^{\circ}C$. The memory window volatge of the BLT film was 2.5V. The leakage current of BLT films annealed at $650^{\circ}C$ was about $1\times10^{-7}A/\textrm{cm}^2$ at 3V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.73-74
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• 2006

Ferroelectric thin films have been widely investigated for future nonvolatile memory application. We fabricated the BLT ($(Bi,La)_4Ti_3O_{12}$) films on Si using a STA ($SrTa_2O_6$) buffer layer BLT and STA film were prepared by sol-gel method. Measurement data by XRD and AFM, showed that BLT film and STA films were well crystallized and a good surface morphology. From C-V measurement reward that the Au/BLT/STA/Si structure showed a clockwise hysteresis loop with a memory window of 1.5 V for the bias voltage sweep of ${\pm}5$ V. From results, the Au/BLT/STA/Si structure is useful for FeFETs.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.7-12
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• 2003

The $Bi_{3.3}La_{0.7}O_{12}$(BLT) capacitors with Metal-Ferroelectric-Insulator-Silicon structure were prepared on $SiO_2/Si$ substrates by using sol-gel method. The BLT thin films annealed at $650^{\circ}C$ and $700^{\circ}C$ showed randomly oriented perovskite crystalline structures. The full with at half maximum (FWHM) of the (117) main peak was decreased from $0.65^{\circ}$ to $0.53^{\circ}$ with increasing the annealing temperature from $650^{\circ}C$ to $700^{\circ}C$, indicating the improvement in the crystalline quality of the film. In addition, the grain size and $R_rms$ , values were increased with increasing the annealing temperatures, showing the rough film surface at higher annealing temperatures. From the capacitance-voltage (C-V) measurements, the memory window voltage of the BLT film annealed at $700^{\circ}C$ was found to be about 0.7 V at an applied voltage of 5 V. The leakage current density of the BLT film annealed at $700^{\circ}C$ was about $3.1{\times}10^{-8}A/cm^2$.

• Korean Journal of Materials Research
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• v.12 no.11
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• pp.835-839
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• 2002

Metal-Ferroelectric-Metal(MFM) capacitors were prepared using $Bi_{3.3}$ $La_{0.7}$ $Ti_3$$O_{12}$ (BLT) ferroelectric thin films which were spin coated on $Pt/Ti/SiO_2$/Si substrates by the Sol-Gel method. BLT thin films annealed at above $650^{\circ}C$ showed polycrystalline structures with typical c-axis preferred orientation. The grain size and surface roughness were increased as the annealing temperature increased from $650^{\circ}C$ to $700^{\circ}C$. In addition, the full width at half maximum (FWHM) values were decreased with increasing annealing temperatures, indicating the improvement of crystallinity. The remanent polarization (2Pr= $Pr^{+}$ $+Pr^{-) }$ and leakage current of the BLT film annealed at $650^{\circ}C$ were about 29.3 $\mu$C/cm$^2$ and $2.3$\times$10^{-8}$$ A/cm^2$ at 3V. There were no distinct changes in the retention charges after $10^{10}$ polarization switching cycles, showing good fatigue property of the annealed BLT films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.174-177
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• 2003

$Cl_2$ 플라즈마를 이용한 BLT 박막의 식각에서 Ar 가스의 첨가에 따른 식각 속도, 선택비 및 식각 형상의 변화에 대하여 관찰하였다. BLT 박막의 식각 속도는 100% Ar 플라즈마에서 100 % $Cl_2$ 플라즈마에서의 식각 속도보다 약 1.5배정도 빨랐으며, 80% Ar/20% $Cl_2$ 조건에서 $503{\AA}/min$ 최대 식각의 최대 시각 속도를 얻었다. RF 전력과 직류 바이어스 전압을 증가함에 따라 식각 속도는 증가하였으며, $Ar/Cl_2$ 플라즈마의 식각 속도가 $Cl_2$ 플라즈마의 식각 속도 보다 높았다. 식각 공정 변수의 변화에 의한 플라즈마 변수가 BLT 식각 속도에 미치는 영향을 관찰하기 위하여 LP(Lanmuir porbe)와 OES(optical emission spectroscopy)분석을 수행하였다. Ar 첨가량이 증감함에 따라 LP 분석에서 전자의 온도는 증가하였으나 전자밀도는 감소하였다. 이는 Ar의 이온화 준위가 Cl 보다 높기 때문에 이온화 윷이 낮아지기 때문으로 판단된다, 또한, OES 분석에서 Ar 첨가량이 증가함에 따라 Cl 원자의 부피 밀도는 감소하였다. Ar 첨가에 의한 BLT 박막의 식각 속도의 변화와 LP 및 OES 분석을 고려하면, BLT 박막은 화학적 식각의 도움을 받는 무리적 식각에 의하여 식각됨을 확인하였다,

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.368-369
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• 2006

Ferroelectric thin films have attracted much attention for applications in nonvolatile ferroelectric random access memories(NVFeRAM) from the view points of high speed operation, low power consumption, and large scale Integration[1,2]. Among the FRAM, BLT is of particular interest. as it is not only crystallized at relatively low processing temperature, but also shows highly fatigue resistance and large remanent polarization Meanwhile, these submicron ferroelectric capacitors were fabricated by a damascene process using Chemical mechanical polishing (CMP). BLT capacitors were practicable by a damascene process using CMP. The P-E hysteresis were measured under an applied bias of ${\pm}5V$ by using an RT66A measurement system. The electric properties such as I-V were determined by using HP4155A analysers.