• 제목/요약/키워드: Amorphous silicon

검색결과 793건 처리시간 0.023초

텅스텐 할로겐 램프에 의한 절연층 상의 실리콘 (Rapid Thermal Annealing of Silicon on Insulator (SOI) with a W-Halogen Lamp)

  • 김춘근;김용태;민석기
    • 대한전자공학회논문지
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    • 제25권8호
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    • pp.950-958
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    • 1988
  • We have implemented a RTA system using W-halogen lamps and tried to recrystallize the phosphorus ion implanted amorphous silicon on insultor (SOI) taking advantages of seeding window. The purpose of this study is to investigate the possibility of a typical crystalline orientation occurred during the solidifying process of molten amorphous silicon layer. Experimental results show that several twin boundaries are found on the seeding window region after annealing for 15 sec at 1040\ulcorner. These twin boundaries represent that the recrystallization is partialy possible and when the annealing is done at 1150\ulcorner, (100) etch pits with <110> facets are found on the solidified amorphous silicon layer. Consequently, Hall mobility of recrystallized silicon film is measured and the thermal behavior of grain boundary is also observed by SEM.

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급냉응고된 비정질 실리콘 분말의 원자구조에 관한 연구 (Characterization of Atomic Structure in Rapidly Solidified Amorphous Silicon)

  • 김연옥
    • 한국재료학회지
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    • 제4권6호
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    • pp.644-650
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    • 1994
  • Electrohydrodynamic Atomization 급냉응고장치를 이용하여 고순도 실리콘 미세분말을 제조하여 투과전자현미경으로 미세조직과 그 응고상을 조사한 결과 직경이 60nm 이하인 분말에서 비장질상이 발견되었다. 비정질 실리콘의 원자구조를 분석하기 위하여 비정질 분말에서 얻은 전자회절 데이타를 이용하여 radial distribution function을 계산하여 해석한 결과, 실리콘의 결정구조인 다이아몬드 입방격자에서 발견되는 기본적 정사면체 배열이 비정질 실리콘의 2번째 근접원자간 거기까지 유지됨을 알 수 있었으며 이로부터 비정질 실리\ulcorner이 단범위 규칙성을 갖는 tetrahedrally coordinated random network 원자배열로 이루어짐을 알았다.

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PECVD 방법으로 증착한 Si박막의 SPC 성장 (SPC Growth of Si Thin Films Preapared by PECVD)

  • 문대규;임호빈
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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    • pp.42-45
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    • 1992
  • The poly silicon thin films were prepared by solid phase crystallization at 600$^{\circ}C$ of amorphous silicon films deposited on Corning 7059 glass and (100) silicon wafer with thermally grown SiO$_2$substrate by plasma enhanced chemical vapor deposition with varying rf power, deposition temperature, total flow rate. Crystallization time, microstructure, absorption coefficients were investigated by RAMAN, XRD analysis and UV transmittance measurement. Crystallization time of amorphous silicon films was increased with increasing rf power, decreasing deposition temperature and decreasing total flow rate.

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보론 도우핑된 비정질 실리콘 박막 트랜지스터의 열에 의한 준안정성 연구 (Thermally Induced Metastability in Boron-Doped Amorphous Silicon Thin Film Transistor)

  • 이이상;추혜용;장진
    • 대한전자공학회논문지
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    • 제26권3호
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    • pp.130-136
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    • 1989
  • 보론이 도우핑된 수소화된 비정질 실리콘을 이용한 박막 트랜지스터를 플라즈마 CVD 방법으로 제작하여 트랜지스터의 특성 및 준안정성에 관한 연구를 수행하였다. 보론이 도우핑된 비정질 실리콘 ambipolar 트랜지스터를 열평형 온도 이상에서 급냉하면, active dopants가 증가하고 경계면 상태밀도가 감소하여 정공채널에 의한 드레인 전류가 증가하고 전자채널의 드레인 전류는 급냉 온도에 따라 증가하다 감소되는 현상을 측정하였다. 이런 급냉 효과는 실리콘내에 있는 수소의 운동과 밀접한 관계가 있고 active dopants, 댕글링 본드 및 경계면 상태밀도의 변화로 해석된다.

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비정질 실리콘 박막에서 결정상 실리콘의 입자성장에 관한 고분해능 투과전자현미경에 의한 연구 (A High-Resolution Transmission Electron Microscopy Study of the Grain Growth of the Crystalline Silicon in Amorphous Silicon Thin Films)

  • 김진혁;이정용;남기수
    • 전자공학회논문지A
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    • 제31A권7호
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    • pp.85-94
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    • 1994
  • A high-resolution transmission electron microscopy study of the solid phase crystallization of the amorphous silicon thin films, deposited on SiOS12T at 52$0^{\circ}C$ by low pressure chemical vapor deposition and annealed at 55$0^{\circ}C$ in a dry N$_{2}$ ambient was carried out so that the arrangement of atoms in the crystalline silicon and at the amorphous/crystalline interface of the growing grains could be understood on an atomic level. Results show that circular crystalline silicon nuclei have formed and then the grains grow to an elliptical or dendritic shape. In the interior of all the grains many twins whose{111} coherent boundaries are parallel to the long axes of the grains are observed. From this result, it is concluded that the twins enhance the preferential grain growth in the <112> direction along {111} twin planes. In addition to the twins. many defect such as intrinsic stacking faults, extrinsic stacking faults, and Shockley partial dislocations, which can be formed by the errors in the stacking sequence or by the dissociation of the perfect dislocation are found in the silicon grain. But neither frank partial dislocations which can be formed by the condensation of excess silicon atoms or vacancies and can form stacking fault nor perfect dislocations which can be formed by the plastic deformation are observed. So it is concluded that most defects in the silicon grain are formed by the errors in the stacking sequence during the crystallization process of the amorphous silicon thin films.

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Effect of Specific Surface Area on the Reaction of Silicon Monoxide with Porous Carbon Fiber Composites

  • Park, Min-Jin;Lee, Jae-Chun
    • The Korean Journal of Ceramics
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    • 제4권3호
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    • pp.245-248
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    • 1998
  • Porous carbon fiber composites (CFCs) having variable specific surface area ranging 35~1150 $\m^2$/g were reacted to produce silicon carbide fiber composites with SiO vapor generated from a mixture of Si and $SiO_2$ at 1673 K for 2 h under vacuum. Part of SiO vapor generated during conversion process condensed on to the converted fiber surface as amorphous silica. Chemical analysis of the converted CFCs resulting from reaction showed that the products contained 27~90% silicon carbide, 7~18% amorphous silica and 3~63% unreacted carbon, and the composition depended on the specific carbide, 7~18% amorphous silica and 3~63% unreacted carbon, and the composition depended on the specific surface area of CFCs. CFC of higher specific surface area yielded higher degree of conversion of carbon to silicon and conversion products of lower mechanical strength due to occurrence of cracks in the converted caron fiber. As the conversion of carbon to silicon carbide proceeded, pore size of converted CFCs increased as a result of growth of silicon carbide crystallites, which is also linked to the crack formation in the converted fiber.

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Intrinsic layer 두께 가변에 따른 단일접합 비정질 박막 태양전지의 효율 특성 변화 (The efficiency charateristics of intrinsic layer thickness dependence for amorphous silicon single junction solar cells)

  • 윤기찬;김영국;허종규;최형욱;이영석;이준신
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2009년도 춘계학술대회 논문집
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    • pp.80-82
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    • 2009
  • The dependence of the efficiency characteristics of hydrogenated amorphous silicon single junction solar cells on the various intrinsic layer thickness has been investigate in the glass/$SnO_2$:F/p,i,n a-Si:H/Al type of amorphous silicon solar cells by cluster PECVD system. The open circuit voltage, short circuit current, fill factor and conversion efficiency have been measured under AM 1.5 condition. The result of the cell performance was improved about 8.2% due to an increase in the short circuit current.

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스퍼터링 및 화학기상 증착 비정질 수소화 실리콘박막의 고상결정화 (Solid Phase Crystallizations of Sputtered and Chemical Vapor Deposited Amorphous Hydrogenated Silicon (a-Si:H) Thin Film)

  • 김형택
    • 한국전기전자재료학회논문지
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    • 제11권4호
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    • pp.255-260
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    • 1998
  • Behavior of solid phase crystallizations (SPC) of RF sputtered and LPCVD amorphous hydrogenated silicon film were investigated. LPCVD films showed the higher degree of crystallinity and larger grain size than sputtered films. The applicable degree of crystallinity was also obtained from sputtered films. The deposition method of amorphous silicon film influenced the behavior of post annealing SPC. Observed degree of crystallinity of sputtered films strongly depended on the partial pressure of hydrogen in deposition. The higher deposition temperature of sputtering provided the better crystallinity after SPC. Due to the high degree of poly-crystallinity, the retardation of larger grain growth was observed on sputtering film.

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고성능 비정질실리콘 박막태양전지를 위한 전후면 계면에서의 빛의 효율적 관리 기술 (Light-managing Techniques at Front and Rear Interfaces for High Performance Amorphous Silicon Thin Film Solar Cells)

  • 강동원
    • 전기학회논문지
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    • 제66권2호
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    • pp.354-356
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    • 2017
  • We focused on light management technology in amorphous silicon solar cells to suppress increase in absorber thickness for improving power conversion efficiency (PCE). $MgF_2$ and $TiO_2$ anti-reflection layers were coated on both sides of Asahi VU ($glass/SnO_2:F$) substrates, which contributed to increase in PCE from 9.16% to 9.81% at absorber thickness of only 150 nm. Also, we applied very thin $MgF_2$ as a rear reflector at n-type nanocrystalline silicon oxide/Ag interface to boost photocurrent. By reinforcing rear reflection, we could find the PCE increase from 10.08% up to 10.34% based on thin absorber about 200 nm.