• 제목/요약/키워드: AlGaN/GaN HFET

검색결과 16건 처리시간 0.017초

Investigation of Buffer Traps in AlGaN/GaN Heterostructure Field-Effect Transistors Using a Simple Test Structure

  • Jang, Seung Yup;Shin, Jong-Hoon;Hwang, Eu Jin;Choi, Hyo-Seung;Jeong, Hun;Song, Sang-Hun;Kwon, Hyuck-In
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.478-483
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    • 2014
  • We propose a new method which can extract the information about the electronic traps in the semi-insulating GaN buffer of AlGaN/GaN heterostructure field-effect transistors (HFETs) using a simple test structure. The proposed method has a merit in the easiness of fabricating the test structure. Moreover, the electric fields inside the test structure are very similar to those inside the actual transistor, so that we can extract the information of bulk traps which directly affect the current collapse behaviors of AlGaN/GaN HEFTs. By applying the proposed method to the GaN buffer structures with various unintentionally doped GaN channel thicknesses, we conclude that the incorporated carbon into the GaN back barrier layer is the dominant origin of the bulk trap which affects the current collapse behaviors of AlGaN/GaN HEFTs.

AlGaN/GaN-on-Si Power FET with Mo/Au Gate

  • Kim, Hyun-Seop;Jang, Won-Ho;Han, Sang-Woo;Kim, Hyungtak;Cho, Chun-Hyung;Oh, Jungwoo;Cha, Ho-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권2호
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    • pp.204-209
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    • 2017
  • We have investigated a Mo/Au gate scheme for use in AlGaN/GaN-on-Si HFETs. AlGaN/GaN-on-Si HFETs were fabricated with Ni/Au or Mo/Au gates and their electrical characteristics were compared after thermal stress tests. While insignificant difference was observed in DC characteristics, the Mo/Au gate device exhibited lower on-resistance with superior pulsed characteristics in comparison with the Ni/Au gate device.

Normally-Off Operation of AlGaN/GaN Heterojunction Field-Effect Transistor with Clamping Diode

  • Han, Sang-Woo;Park, Sung-Hoon;Kim, Hyun-Seop;Lim, Jongtae;Cho, Chun-Hyung;Cha, Ho-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권2호
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    • pp.221-225
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    • 2016
  • This paper reports a new method to enable the normally-off operation of AlGaN/GaN heterojunction field-effect transistors (HFETs). A capacitor was connected to the gate input node of a normally-on AlGaN/GaN HFET with a Schottky gate where the Schottky gate acted as a clamping diode. The combination of the capacitor and Schottky gate functioned as a clamp circuit to downshift the input signal to enable the normally-off operation. The normally-off operation with a virtual threshold voltage of 5.3 V was successfully demonstrated with excellent dynamic switching characteristics.

Pulse-Mode Dynamic Ron Measurement of Large-Scale High-Power AlGaN/GaN HFET

  • Kim, Minki;Park, Youngrak;Park, Junbo;Jung, Dong Yun;Jun, Chi-Hoon;Ko, Sang Choon
    • ETRI Journal
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    • 제39권2호
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    • pp.292-299
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    • 2017
  • We propose pulse-mode dynamic $R_on$ measurement as a method for analyzing the effect of stress on large-scale high-power AlGaN/GaN HFETs. The measurements were carried out under the soft-switching condition (zero-voltage switching) and aimed to minimize the self-heating problem that exists with the conventional hard-switching measurement. The dynamic $R_on$ of the fabricated AlGaN/GaN MIS-HFETs was measured under different stabilization time conditions. To do so, the drain-gate bias is set to zero after applying the off-state stress. As the stabilization time increased from $ 0.1{\mu}s$ to 100 ms, the dynamic $R_on$ decreased from $160\Omega$ to $2\Omega$. This method will be useful in developing high-performance GaN power FETs suitable for use in high-efficiency converter/inverter topology design.

부분 채널도핑된 GaAs계 이중이종접합 전력FET의 선형성 증가 (Linearity Enhancement of Partially Doped Channel GaAs-based Double Heterostructure Power FETs)

  • 김우석;김상섭;정윤하
    • 대한전자공학회논문지SD
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    • 제39권1호
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    • pp.83-88
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    • 2002
  • HFET 소자의 선형성과 게이트-트레인 항복특성을 향상시키기 위해 부분채널 도핑된 Al/sub 0.25/Ga/sub 0.75/As/In/sub 0.25/Ga/sub 0.75/As/Al/sub 0.25/Ga/sub 0.75/As 이종접합 구조를 갖는 FET를 제안하였다. 제안된 HFET는 게이트 전극 아래로 도핑되지 않은 AlGaAs 진성공급층을 두어 -2OV 의 높은 항복전압을 얻었다. 또한 소자의 InGaAs 채널에 부분 도핑을 실시하여, 균일 채널 도핑을 실시한 경우보다 향상된 선형성을 유도하였고, 2차원 전산모사 견과와 제작 및 측정결과를 통해 선형성의 향상을 확인하였다. 본 실험에서 제안된 HFET소자는 DC측정 결과와 고주파측정 결과 모두에서 기존의 FET소자들에 비해 향상된 선형성을 나타내었다.

Device Performances Related to Gate Leakage Current in Al2O3/AlGaN/GaN MISHFETs

  • Kim, Do-Kywn;Sindhuri, V.;Kim, Dong-Seok;Jo, Young-Woo;Kang, Hee-Sung;Jang, Young-In;Kang, In Man;Bae, Youngho;Hahm, Sung-Ho;Lee, Jung-Hee
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.601-608
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    • 2014
  • In this paper, we have characterized the electrical properties related to gate leakage current in AlGaN/GaN MISHFETs with varying the thickness (0 to 10 nm) of $Al_2O_3$ gate insulator which also serves as a surface protection layer during high-temperature RTP. The sheet resistance of the unprotected TLM pattern after RTP was rapidly increased to $1323{\Omega}/{\square}$ from the value of $400{\Omega}/{\square}$ of the as-grown sample due to thermal damage during high temperature RTP. On the other hand, the sheet resistances of the TLM pattern protected with thin $Al_2O_3$ layer (when its thickness is larger than 5 nm) were slightly decreased after high-temperature RTP since the deposited $Al_2O_3$ layer effectively neutralizes the acceptor-like states on the surface of AlGaN layer which in turn increases the 2DEG density. AlGaN/GaN MISHFET with 8 nm-thick $Al_2O_3$ gate insulator exhibited extremely low gate leakage current of $10^{-9}A/mm$, which led to superior device performances such as a very low subthreshold swing (SS) of 80 mV/dec and high $I_{on}/I_{off}$ ratio of ${\sim}10^{10}$. The PF emission and FN tunneling models were used to characterize the gate leakage currents of the devices. The device with 5 nm-thick $Al_2O_3$ layer exhibited both PF emission and FN tunneling at relatively lower gate voltages compared to that with 8 nm-thick $Al_2O_3$ layer due to thinner $Al_2O_3$ layer, as expected. The device with 10 nm-thick $Al_2O_3$ layer, however, showed very high gate leakage current of $5.5{\times}10^{-4}A/mm$ due to poly-crystallization of the $Al_2O_3$ layer during the high-temperature RTP, which led to very poor performances.