• Title/Summary/Keyword: 3D ComputerGraphics

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A Design of 3D Graphics Geometry Processor for Mobile Applications (휴대 단말기용 3D Graphics Geometry Processor 설계)

  • Lee, Ma-Eum;Kim, Ki-Chul
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.917-920
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    • 2005
  • This paper presents 3D graphics geometry processor for mobile applications. Geometry stage needs to cope with the large amount of computation. Geometry stage consists of transformation process and lighting process. To deal with computation in geometry stage, the vector processor that is based on pipeline chaining is proposed. The performance of proposed 3D graphics geometry processor is up to 4.3M vertex/sec at 100 MHz. Also, the designed processor is compliant with OpenGL ES that is widely used for standard API of embedded system. The proposed structure can be efficiently used in 3D graphics accelerator for mobile applications.

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Design of Pipelined Floating-Point Arithmetic Unit for Mobile 3D Graphics Applications

  • Choi, Byeong-Yoon;Ha, Chang-Soo;Lee, Jong-Hyoung;Salclc, Zoran;Lee, Duck-Myung
    • Journal of Korea Multimedia Society
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    • v.11 no.6
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    • pp.816-827
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    • 2008
  • In this paper, two-stage pipelined floating-point arithmetic unit (FP-AU) is designed. The FP-AU processor supports seventeen operations to apply 3D graphics processor and has area-efficient and low-latency architecture that makes use of modified dual-path computation scheme, new normalization circuit, and modified compound adder based on flagged prefix adder. The FP-AU has about 4-ns delay time at logic synthesis condition using $0.18{\mu}m$ CMOS standard cell library and consists of about 5,930 gates. Because it has 250 MFLOPS execution rate and supports saturated arithmetic including a number of graphics-oriented operations, it is applicable to mobile 3D graphics accelerator efficiently.

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A Design of 3D Graphics Lighting Processor for Mobile Applications (휴대 단말기용 3D Graphics Lighting Processor 설계)

  • Yang, Joon-Seok;Kim, Ki-Chul
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.837-840
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    • 2005
  • This paper presents 3D graphics lighting processor based on vector processing using pipeline chaining. The lighting process of 3D graphics rendering contains many arithmetic operations and its complexity is very high. For high throughput, proposed processor uses pipelined functional units. To implement fully pipelined architecture, we have to use many functional units. Hence, the number of functional units is restricted. However, with the restricted number of pipelined functional units, the utilization of the units is reduced and a resource reservation problem is caused. To resolve these problems, the proposed architecture uses vector processing using pipeline chaining. Due to its pipeline chaining based architecture, it can perform 4.09M vertices per 1 second with 100MHz frequency. The proposed 3D graphics lighting processor is compatible with OpenGL ES API and the design is implemented and verified on FPGA.

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A Kinematics Approach to 3D Graphical Interface (3D 그래픽스 인터페이스에 대한 운동학적 접근)

  • Lee, Joo-Haeng;Jang, Tae-Ik;Kim, Myung-Soo;Kim, Mansoo;Chong, Kyung Taek;Lee, Ee Taek
    • Journal of the Korea Computer Graphics Society
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    • v.2 no.2
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    • pp.53-60
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    • 1996
  • In 3D graphics interface, 3D objects and virtual camera have many degrees of freedom. We interpret the control of 3D objects and virtual camera as a problem of kinematics and inverse kinematics. It is well known that extra degrees of freedom introduce various singularities in inverse kinematics. In this paper, we approach 3D graphics interface problems by reducing redundant degrees of freedom so that the control degrees of freedom matches with the degrees of freedom in the motions of 3D objects and virtual camera.

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Design and MPW Implementation of 3D Graphics Floating Point Ips (3차원 그래픽용 부동 소수점 연산기 IP 설계 및 MPW 구현)

  • Lee, Jung-Woo;Kim, Ki-Chul
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.987-988
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    • 2006
  • This paper presents a design and MPW implementation of 3D Graphics Floating Point IPs. Designed IPs include adder, subtractor, multiplier, divider, and reciprocal unit. The IPs have pipelined structures. The IPs meet the accuracy required in OpenGL ES. The operation frequency of the IPs is 100MHz. The IPs can be efficiently used in 3D graphics accelerators.

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A Design of a 8-Thread Graphics Processor Unit with Variable-Length Instructions

  • Lee, Kwang-Yeob;Kwak, Jae-Chang
    • Journal of information and communication convergence engineering
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    • v.6 no.3
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    • pp.285-288
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    • 2008
  • Most of multimedia processors for 2D/3D graphics acceleration use a lot of integer/floating point arithmetic units. We present a new architecture with an efficient ALU, built in a smaller chip size. It reduces instruction cycles significantly based on a foundation of multi-thread operation, variable length instruction words, dual phase operation, and phase instruction's coordination. We can decrease the number of instruction cycles up to 50%, and can achieve twice better performance.

Hardware-Accelerated Real-Time Rendering for 3D Su-Muk Painting (하드웨어 가속 실시간 3차원 수묵화 렌더링)

  • Kang, Shin-Jin;Kim, Chang-Hun
    • Journal of the Korea Computer Graphics Society
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    • v.8 no.2
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    • pp.31-38
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    • 2002
  • This paper presents a method for real-time 3D Sumi-e rendering us ing normal graphics hardware. Sumi-e is one of the traditional oriental painting styles. Most research on Sumi-e paintings has focused on 2D or :2.5D Sumi-e brushwork simulation. On these systems. complicated user's hand drawing is required to generate the image of Sumi-e effects. and it can render the 2D or 2.5D Sumi-e images only. We present an automated rendering system for 3D image of Sumi-e painting. It uses 3D common object as an input data and does not need any additional input of user brushwork. Especially for the real-time rendering. hardware-accelerated algorithm for Sumi-e rendering is newly suggested in our system. It is designed with efficiency for customer level graphics hard ware. The results of this paper show that the features of traditional Sumi-e painting are successfully modeled and that 3D Sumi-e painting is rendered in real-time effectively.

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A Study on the Establishment of a Production Pipeline Imported 3D Computer Graphics for Clay Characters (3D 컴퓨터그래픽을 도입한 클레이 캐릭터 제작 공정 개발에 관한 연구)

  • Kim, Jung-Ho
    • Journal of Korea Multimedia Society
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    • v.11 no.9
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    • pp.1245-1257
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    • 2008
  • The establishment of a production pipeline imported 30 computer graphics is suggested in this paper to improve the efficiency of existing production pipeline of clay animation. The point is that the process of building clay characters that remains labor intensive among the existing procedures is replaced by the process of creating computer generated characters. In order to create characters out of clay by means of 30 computer graphics, a diffuse map and displacement map are made of an oil-based clay according to the UVW coordination of polygon modeling, which is the same color and kind of clay used to make a clay character. In addition, a panoramic HDRI recording system is developed to record the lighting information of shooting environment for miniature sets, which is imported in 3D computer graphic tools as digital light source. On account of the new production pipeline, a hyper realistic rendering image can be produced, and at the same time it improves the traditional pipeline of stop motion animation that is know-how based procedure of a complete artist by the engineering approach to the automatic process.

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Application of Multi-Resolution Modeling in Collaborative Design (협업 설계에서의 다중해상도 모델링 응용)

  • Kim, Taeseong;Han, Junghyun
    • Journal of the Korea Computer Graphics Society
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    • v.9 no.2
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    • pp.1-9
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    • 2003
  • Information assurance(IA) refers to methodologies to protect engineering information by ensuring its availability, confidentiality, integrity, non-repudiation, authentication, access control, etc. In collaborative design, IA techniques are needed to protect intellectual property, establish security privileges and create "need to know" protections on critical features. Aside from 3D watermarking, research on how to provide IA to distributed collaborative engineering teams is largely non-existent. This paper provides a framework for information assurance within collaborative design, based on a technique we call role-based viewing. Such role-based viewing is achieved through integration of multi-resolution geometry and security models. 3D models are geometrically partitioned, and the partitioning is used to create multi-resolution mesh hierarchies. Extracting an appropriately simplified model suitable for access rights for individual designers within a collaborative design environment is driven by an elaborate access control mechanism.

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Computer Graphics : Theoretical Study of Antibacterial Quinolone Derivatives as DNA-Intercalator (Computer Graphies : Quinolone계 항균제의 DNA-Intercalator에 관한 이론적 연구)

  • 서명은
    • YAKHAK HOEJI
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    • v.39 no.1
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    • pp.78-84
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    • 1995
  • Based on Computer graphics molecular modeling method, quinolone derivatives as DNA-gyrase inhibitors formed stable DNA-intercalation complex with deoxycytidilyl-3',5'-deoxy guanosine[d($C_{p}G)_{2}$] dinucleotide. When d($C_{p}G)_{2}$ and d($A_{p}T)_{2}$, were compared in order to find out which DNA could form more stable DNA-Drug complex based on interaction energy($\Delta$E) and DNA-Drug complex energy, d($C_{p}G)_{2}$ resulted in lower energy than d($A_{p}T)_{2}$.

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