• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.6
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• pp.1027-1034
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• 2017

In this paper, we propose a new function embedding method that can measure mathematical projections of probability amplitude, probability, average expectation and matrix elements of stationary-state unit matrix at all control operation points of quantum gates. The function embedding method in this paper is to embed orthogonal normalization condition of probability amplitude for each control operating point into a binary scalar operator by using Dirac symbol and Kronecker delta symbol. Such a function embedding method is a very effective means of controlling the arithmetic power function of a unitary gate in a unitary transformation which expresses a quantum gate function as a tensor product of a single quantum. We present the results of evolutionary operation and projective measurement when we apply the proposed function embedding method to the ternary 2-qutrit cNOT gate and compare it with the existing methods.

• Proceedings of The KACE
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• 2017.08a
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• pp.157-160
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• 2017

최근 자연 언어 처리 분야에서는 단어를 실수벡터로 임베딩하는 워드 임베딩(Word embedding) 기술이 많은 각광을 받고 있다. 최근에는 서로 다른 두 언어를 이용한 이중 언어 위드 임베딩(Bilingual word embedding) 방법을 사용하는 연구가 많이 이루어지고 있는데, 이중 언어 워드 임베딩에서 임베딩 절과의 질은 학습하는 코퍼스의 정렬방식에 따라 많은 영향을 받는다. 본 논문은 자막 병렬 코퍼스를 이용하여 밑바탕 어휘집(Seed lexicon)을 구축하여 번역 연결 강도를 향상시키고, 이중 언어 워드 임베딩의 사천(Vocabulary) 확장을 위한 언어별 연결 함수(Language-specific mapping function)을 학습하는 새로운 방식의 모델을 제안한다. 제안한 모델은 기존 모델과의 성능비교에서 비교할만한 수준의 결과를 얻었다.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.1
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• pp.101-108
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• 2017

As the quantum gate matrix is a $r^{n+1}{\times}r^{n+1}$ dimension when the radix is r, the number of control state vectors is n, and the number of target state vectors is one, the matrix dimension with increasing n is exponentially increasing. If the number of control state vectors is $2^n$, then the number of $2^n-1$ unit matrix operations preserves the output from the input, and only one can be performed the unitary operation to the target state vector. Therefore, this paper proposes a new method of function embedding that can replace $2^n-1$ times of unit matrix operations with deterministic contribution to matrix dimension by arithmetic power switch of the unitary gate. The proposed function embedding method uses a binary literal switch with a multivalued threshold, so that a general purpose hybrid MCU gate can be realized in a $r{\times}r$ unitary matrix.

• Proceedings of the Korea Information Processing Society Conference
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• 2017.04a
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• pp.941-944
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• 2017

심층 학습에 기반을 둔 통계적 언어모형에서 가장 중요한 작업은 단어의 분산 표현(Distributed Representation)이다. 단어의 분산 표현은 단어 자체가 가지는 의미를 다차원 공간에서 벡터로 표현하는 것으로서, 워드 임베딩(word embedding)이라고도 한다. 워드 임베딩을 이용한 심층 학습 기반 통계적 언어모형은 전통적인 통계적 언어모형과 비교하여 성능이 우수한 것으로 알려져 있다. 그러나 워드 임베딩 역시 자료 부족분제에서 벗어날 수 없다. 특히 학습데이터에 나타나지 않은 단어(unknown word)를 처리하는 것이 중요하다. 본 논문에서는 고품질 한국어 워드 임베딩을 위하여 단어의 의미적 계층정보를 이용한 워드 임베딩 방법을 제안한다. 기존연구에서 제안한 워드 임베딩 방법을 그대로 활용하되, 학습 단계에서 목적함수가 입력 단어의 하위어, 동의어를 반영하여 계산될 수 있도록 수정함으로써 단어의 의미적 계층청보를 반영할 수 있다. 본 논문에서 제안한 워드 임베딩 방법을 통해 생성된 단어 벡터의 유추검사(analog reasoning) 결과, 기존 방법보다 5%가 증가한 47.90%를 달성할 수 있었다.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04a
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• pp.599-602
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• 2002

본 논문에서는 피라미드 구조를 정방형 2-차원 메쉬로 임베딩하는 문제를 다룬다. $(4^N-1)$/3개의 정점들로 구성된 높이 N인 피라미드 $P_N$을 대상으로$(N\geq5)$인 경우에 $2^N\times2^N$의 2-차원 메쉬로 신장율 $(5/8){\cdot}2^{N-1}$로 임베딩이 가능한 새로운 임베딩 함수를 제안한다. 이러한 결과는 통일한 조건 하에서 기존의 연구결과보다 신장율 면에서 3/8에 해당하는 개선을 의미한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.11a
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• pp.325-328
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• 2003

본 논문에서는 주어진 손님 그래프 모델의 정점들과 간선들을 성능 파라미터들을 보다 우수하게 유지하면서 주인 그래프의 대응되는 정점들 및 경로들로 매핑시키는 "그래프 임베딩 문제"라고 불리는 그래프이론 문제를 다룬다. 높이가 N인 피라미드 모델을 손님 그래프로 하여 0$(4^{(k+1)}+2)/3{\times}2^{(N-k-1)}{\times}2^{(N-k-2)}$ 구조의 병렬컴퓨터 모델로 임베딩할 수 있는 새로운 매핑 함수를 제안하고 해당 함수 적용시 신장율이 $max\{(2^{(2k+1)}+4)/3,\;5{\cdot}2^{N-k-2}/8\}$로 개선됨을 증명함으로써 그 성능을 분석한다.

• The KIPS Transactions:PartA
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• v.10A no.6
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• pp.627-634
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• 2003

In this paper, we consider a graph-theoretic problem,, the so-called "graph embedding problem" that maps the vertices and edges of the given guest graph model into the corresponding vertices and paths of the host graph under the condition of maintaining better performance parameters such as dilation, congestion, and expansion. We firstly propose a new mapping function which can embed the pyramid model with height N into the 3-dimensional mesh massively parallel processor system with the height $(4^{(N+1)/3}+2)/3$ and the regular 2-dimensional mesh of one side $2^{(2N-1)/3}$, and analyze the performance of the embedding in terms of the dilation parameter that reflects the number of communication steps between two adjacent vertices under the embedding. We prove that the dilation of the embedding is $2{\cdot}4^{(N-2)/3}+4)/3$. This is superior to the previous result of $4^{N+183}+2)/3$ under the same condition.condition.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.2
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• pp.257-263
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• 2002

A graph embedding problem has been studied for applications of resource allocation and mapping the underlying data structure of a parallel algorithm into the interconnection architecture of massively parallel processing systems. In this paper, we consider the embedding problem of the pyramid into the regular 2-dimensional mesh interconnection network topology. We propose a new embedding function which can embed the pyramid of height N into 2$^{N}$ x2$^{N}$ 2-dimensional mesh with dilation max{2$^{N1}$-2. [3.2$^{N4}$＋1)/2, 2$^{N3}$＋2. [3.2$^{N4}$＋1)/2]}. This means an improvement in the dilation measure from 2$^{N}$ $^1$in the previous result into about (5/8) . 2$^{N1}$ under the same condition.condition.

• Information Systems Review
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• v.25 no.1
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• pp.93-110
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• 2023

Recently, attempts have been made to convert unstructured text into vectors and to analyze vast amounts of natural language for various purposes. In particular, the demand for analyzing texts in specialized domains is rapidly increasing. Therefore, studies are being conducted to analyze specialized and general-purpose documents simultaneously. To analyze specific terms with general terms, it is necessary to align the embedding space of the specific terms with the embedding space of the general terms. So far, attempts have been made to align the embedding of specific terms into the embedding space of general terms through a transformation matrix or mapping function. However, the linear transformation based on the transformation matrix showed a limitation in that it only works well in a local range. To overcome this limitation, various types of nonlinear vector alignment methods have been recently proposed. We propose a vector alignment model that matches the embedding space of specific terms to the embedding space of general terms through end-to-end learning that simultaneously learns the autoencoder and regression model. As a result of experiments with R&D documents in the "Healthcare" field, we confirmed the proposed methodology showed superior performance in terms of accuracy compared to the traditional model.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.11
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• pp.1233-1240
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• 2014

For the last three decades after the advent of the Toffoli gate in 1980, while many reversible circuit syntheses have been presented reversible embedding methods onto suitable reversible functions, only a few proposed direct irreversible-to-reversible mapping methods without reversible embedding. In this paper we present two effective policies to reduce the gate cost and complexity for the existing direct reversible mapping methods without reversible embedding. In order to develop new cost reduction policies we consider the cost influence of Toffoli module according to NOT gate arrangement in classical circuits. From this we deduced an inverse proportional property between inverting input numbers of classical AND/OR gates and reversible Toffoli module cost based on a fact - the inverting inputs of classical AND(OR) gates increase(decrease) the Toffoli module cost. We confirm the applications of the inverting input rearrangement and maximum fan-out policies preceding direct reversible mapping will be effective method to improve the reversible Toffoli module cost and complexity with the parallel using of the fan-out and supercell ones.