• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.18 no.5
• /
• pp.439-444
• /
• 2005

We investigated the structural and electrical properties of BLT films grown on Si covered with $ZrO_{2}$ buffer layer. The BLT thin film and $ZrO_{2}$ buffer layer were fabricated using a metalorganic decomposition method. The electrical properties of the MFIS structure were investigated by varying thickness of the $ZrO_{2}$ layer. AES and TEM show no interdiffusion and reaction that suppressed using the $ZrO_{2}$ film as a buffer layer The width of the memory window in the C-V curves for the MFIS structure decreased with increasing thickness of the $ZrO_{2}$ layer. It is considered that the memory window width of MFIS is not affected by remanent polarization. Leakage current density decreased by about four orders of magnitude after using $ZrO_{2}$ buffer layer. The results show that the $ZrO_{2}$ buffer layers are prospective candidates for applications in MFIS-FET memory devices.

• Journal of the Korean Ceramic Society
• /
• v.42 no.9 s.280
• /
• pp.624-630
• /
• 2005

To investigate the possibility of the $ZrO_2$ buffer layer as the insulator for the Metal-Ferroelectric-Insulator-semiconductor (MFIS) structure, $ZrO_2$ and $SrBi_2Ta_2O_9$ (SBT) thin films were deposited on the P-type Si(111) wafer by the R.F. magnetron-sputtering method. According to the process with and without the post-annealing of the $ZrO_2$ buffer layer and SBT thin film, the diffusion amount of Sr, Bi, Ta elements show slight difference through the Glow Discharge Spectrometer (GDS) analysis. From X-ray Photoelectron Spectroscopy (XPS) results, we could confirm that the post-annealing process affects the chemical binding condition of the interface between the $ZrO_2$ thin film and the Si substrate. Compared to the MFIS structure without the post-annealing of the $ZrO_2$ buffer layer, memory window value of MFlS structure with post-annealing of the $ZrO_2$ buffer layer were considerably improved. The window memory of the Pt/SBT (260 nm, $800^{\circ}C)/ZrO_2$ (20 nm) structure increases from 0.75 to 2.2 V under the applied voltage of 9 V after post-annealing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.05c
• /
• pp.186-189
• /
• 2003

The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $ZrO_2$ and $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the $ZrO_2$ and $CeO_2$ layer. AES show no interdiffusion and the formation of amorphous $SiO_2$ layer is suppressed by using the $ZrO_2$ and $CeO_2$ film as buffer layer between the BLT film and Si substrate. The width of the memory window in the C-V curves for the $BLT/ZrO_2/Si$ and $BLT/CeO_2/Si$ structure is 2.94 V and 1.3V, respectively. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• Journal of the Korean Ceramic Society
• /
• v.42 no.2 s.273
• /
• pp.104-109
• /
• 2005

To study the role of PbO as the buffer layer, Pt/PZT/PbO/Si with the MFIS structure was deposited on the p-type (100) Si substrate by the r.f. magnetron sputtering with $Pb_{1.1}Zr_{0.53}Ti_{0.47}O_3$ and PbO targets. When PbO buffer layer was inserted between the PZT thin film and the Si substrate, the crystallization of the PZT thin films was considerably improved and the processing temperature was lowered. From the result of an X-ray Photoelectron Spectroscopy (XPS) depth profile result, we could confirm that the substrate temperature for the layer of PbO affects the chemical states of the interface between the PbO buffer layer and the Si substrate, which results in the inter-diffusion of Pb. The MFIS with the PbO buffer layer show the improved electric properties including the high memory window and low leakage current density. In particular, the maximum value of the memory window is 2.0V under the applied voltage of 9V for the Pt/PZT(200 nm, $400^{\circ}C)/PbO(80 nm)/Si$ structures with the PbO buffer layer deposited at the substrate temperature of $300^{\circ}C$.

• Progress in Superconductivity and Cryogenics
• /
• v.6 no.3
• /
• pp.12-15
• /
• 2004

There are two major approaches to obtain texture template for HTS coated conductor (CC) ---IBAD and RABiTS. CC's with IBAD template showed both longer and higher Ic results so far. IBAD for CC began with YSZ, the processing of which is very slow compared to other processings needed for the fabrication of CC. Because of this very slow processing speed, IBAD with other materials such as Gd$_2$Zr$_2$O$_{7}$(GZO) and MgO have been developed. The processings of IBAD-GZO and IBAD-MgO are known to be up to 3times and 100 times. respectively, as fast as the processing of IBAD-YSZ. IBAD-MgO is very attractive in that the processing is very fast. IBAD-MgO also needs additional buffer layer(s). Many materials are being investigated to be used as a buffer layer on top of the MgO. BaZrO$_3$ (BZO) is a good candidate as the buffer layer on top of the IBAD-MgO because it is chemically stable and does not react with YBCO at high temperatures. It also has good lattice match with MgO. The BZO film has been deposited on single crystal MgO, and YBCO film was deposited on BZO/MgO to investigate the possibility of using BZO as both the buffer and capping layer of the CC.C.

• Journal of the Korean Ceramic Society
• /
• v.40 no.1
• /
• pp.52-61
• /
• 2003

$SrBi_2Ta_2O_9(SBT)$and$ZrO_2$thin films for MFIS structure(Metal-Ferroelectric-Insulator-Semiconductor) were deposited by RF magnetron sputtering method. In order to investigate the effect of heat treatment of insulator layers and MFIS structure, the insulator layers were heat treated from $550^{circ}C;to; 850^{\circ}C$in conventional furnace or RTA furnace under$O_2$and Ar ambient, respectively. After then, C-V characteristics and leakage current were measured. The capacitor with 20 nm thick $ZrO_2$layer treated at RTA$750^{circ}C;in;O_2$ atmosphere had the largest memory window. The C-V and leakage current characteristics of the$Pt/SBT(260nm)/ZrO_2(20nm)/Si$structure were better than those of$Pt/SBT(260nm)/Si$ structure. These results showed that$ZrO_2$films took a role of buffer layer effectively.

• Progress in Superconductivity and Cryogenics
• /
• v.10 no.3
• /
• pp.5-8
• /
• 2008

On highly-textured IBAD-MgO templates, we have tried to find proper buffer layers among various candidate materials, including $LaMnO_3$ (LMO), $La_2Zr_2O_7$ (LAO), $LaAlO_3$ (LAO), $LaGaO_3$ (LGO), $NdGaO_3$ (NGO), and $BaZrO_3$ (BZO). All buffer layers were deposited on the IBAD-MgO templates by KrF pulsed laser deposition(PLD). LAO layer showed an armorphous phase. LZO, LGO, and NGO layers showed polycrystalline growth. Only LMO and BZO layers exhibited c-axis oriented biaxially textured films. Optimally processed LMO buffer layer at deposition temperature of $750^{\circ}C$ and $PO_2$ of 100mTorr exhibited ${\triangle}{\phi}$ value of ${\sim}-5.2^{\circ}$ and RMS roughness of 5.6nm. Interestingly, BZO buffer layers with ${\triangle}{\phi}$ values of ${\sim}-6^{\circ}$ could be routinely produced over a wide PLD processing condition.

• Journal of the Korean Magnetics Society
• /
• v.9 no.6
• /
• pp.306-311
• /
• 1999

$La_{2/3}Sr_{1/3}MnO_3(LSMO)/YSZ/SiO_2/Si(100)$ polycrystalline thin films were fabricated be chelated sol-gel method The effect of YSZ buffer layer at low field (120 Oe) spin-polarized tunneling magnetotransport (TMR) properties of LSMO thin film was studied at room temperature. Single perovskite LSMO thin films was obtained. The maximum TMR ratio was increased from 0.2 to 0.42 % by the insertion of YSZ buffer. YSZ as diffusion barrier was attributed to the fine microstructure of LSMO thin films and the reduction of dead layer between LSMO and $SiO_2/Si(100)$ interfaces.

• Journal of the Korean Ceramic Society
• /
• v.39 no.4
• /
• pp.377-385
• /
• 2002

The possibility of $ZrO_2$ thin film as insulator for Metal-Ferroelectric-Insulator-Semiconductor(MFIS) structure was investgated. $SrBi_2Ta_2O_9$ and $SrBi_2Ta_2O_9$(SBT) thin films were deposited on P-type Si(111) wafer by R. F. magnetron sputtering method. The electrical properties of MFIS gate were relatively improved by inserting the $ZrO_2$ buffer layer. The window memory increased from 0.5 to 2.2V in the applied gate voltage range of 3-9V when the thickness of SBT film increased from 160 to 220nm with 20nm thick $ZrO_2$. The maximum value of window memory is 2.2V in Pt/SBT(160nm)/$ZrO_2$(20nm)/Si structure with the optimum thickness of $ZrO_2$. These memory windows are sufficient for practical application of NDRO-FRAM operating at low voltage.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.1240_1241
• /
• 2009

In this paper, sol-gel-spin coated $Pb(ZrTi)O_3$ thin film with $ZrO_2$ buffer-layer and $PbTiO_3$ seed-layer was investigated for vibration MEMS energy harvester to scavenge power from ambient vibration via d33 piezoelectric mode. Piezoelectric thin film deposition techniques on insulating layer is the important key for $d_{33}$ mode of piezoelectric vibration energy harvester. $ZrO_2$ buff-layer was utilized as an insulating layer. $PbTIO_3$ seed-layer was applied as an inter-layer between PZT and $ZrO_2$ layer to improve the crystalline of PZT thin film. The fabricated PZT thin film had a remanent polarization of 5.3uC/$cm^2$ and the coercive field of 60kV/cm. The fabricated energy harvester using PZT thin film with PTO seed-layer generated 1.1uW of electrical power to $2.2M{\Omega}$ of load with $4.4V_{pvp}$ from vibration of 0.39g at 528Hz.