한국전기전자재료학회:학술대회논문집 (Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference)
- 한국전기전자재료학회 2009년도 하계학술대회 논문집
- /
- Pages.153-153
- /
- 2009
스트레인드 채널이 무캐패시터 메모리 셀의 메모리 마진에 미치는 영향
Impact of strained channel on the memory margin of Cap-less memory cell
- 이충현 (한양대학교 전자컴퓨터통신공학과) ;
- 김성제 (한양대학교 전자컴퓨터통신공학과) ;
- 김태현 (한양대학교 전자컴퓨터통신공학과) ;
- 오정미 (한양대학교 전자컴퓨터통신공학과) ;
- 최기령 (한양대학교 전자컴퓨터통신공학과) ;
- 심태헌 (한양대학교 전자컴퓨터통신공학과) ;
- 박재근 (한양대학교 전자컴퓨터통신공학과)
- Lee, Choong-Hyeon (Department of Electrical & Computer Engineering, Han Yang Univ.) ;
- Kim, Seong-Je (Department of Electrical & Computer Engineering, Han Yang Univ.) ;
- Kim, Tae-Hyun (Department of Electrical & Computer Engineering, Han Yang Univ.) ;
- O, Jeong-Mi (Department of Electrical & Computer Engineering, Han Yang Univ.) ;
- Choi, Ki-Ryung (Department of Electrical & Computer Engineering, Han Yang Univ.) ;
- Shim, Tae-Hun (Department of Electrical & Computer Engineering, Han Yang Univ.) ;
- Park, Jea-Gun (Department of Electrical & Computer Engineering, Han Yang Univ.)
- 발행 : 2009.06.18
초록
We investigated the dependence of the memory margin of the Cap-less memory cell on the strain of top silicon channel layer and also compared kink effect of strained Cap-less memory cell with the conventional Cap-less memory cell. For comparison of the characteristic of the memory margin of Cap-less memory cell on the strain channel layer, Cap-less transistors were fabricated on fully depleted strained silicon-on-insulator of 0.73-% tensile strain and conventional silicon-on-insulator substrate. The thickness of channel layer was fabricated as 40 nm to obtain optimal memory margin. We obtained the enhancement of 2.12 times in the memory margin of Cap-less memory cell on strained-silicon-on-insulator substrate, compared with a conventional SOI substrate. In particular, much higher D1 current of Cap-less memory cell was observed, resulted from a higher drain conductance of 2.65 times at the kink region, induced by the 1.7 times higher electron mobility in the strain channel than the conventional Cap-less memory cell at the effective field of 0.3MV/cm. Enhancement of memory margin supports the strained Cap-less memory cell can be promising substrate structures to improve the characteristics of Cap-less memory cell.