• Title/Summary/Keyword: variable voltage measurement

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Finite Element Analysis of the Effects of Process and Material Parameters on the LVDT Output Characteristics (LVDT의 출력 특성에 미치는 공정 및 재료 변수의 영향에 관한 유한요소해석)

  • Yang, Young-Soo;Bae, Kang-Yul
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.20 no.9
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    • pp.11-19
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    • 2021
  • Linear variable differential transformer (LVDT) is a displacement sensor and is commonly used owing to its wide measurement range, excellent linearity, high sensitivity, and precision. To improve the output characteristics of LVDT, a few studies have been conducted to analyze the output using a theoretical method or a finite element method. However, the material properties of the core and the electromagnetic force acting on the core were not considered in the previous studies. In this study, a finite element analysis model was proposed considering the characteristics of the LVDT composed of coils, core, magnetic shell and electric circuit, and the core displacement. Using the proposed model, changes in sensitivity and linear region of LVDT according to changes in process and material parameters were analyzed. The outputs of the LVDT model were compared with those of the theoretical analysis, and then, the proposed analysis model was validated. When the electrical conductivity of the core was high and the relative magnetic permeability was low, the decrease in sensitivity was large. Additionally, an increase in the frequency of the power led to further decrease in sensitivity. The electromagnetic force applied on the core increased as the voltage increased, the frequency decreased, and the core displacement increased.

A Study on the Method of Resistance Analysis of Water Stream During Fire Supperession (화재진압 시 발생하는 주수 기둥의 저항분석 방법 연구)

  • Jung, Byeong-Sun;Kim, Eung-Sik;Park, Jong-Yeol
    • Journal of the Korean Society of Safety
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    • v.33 no.6
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    • pp.22-27
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    • 2018
  • Fire fighters are exposed to the risk of many accidents during fire suppression, especially near the high voltage circuit. In order to prevent and analyze the electric shock accidents, measurement of water resistance is crucial. However, this has been one of the overlooked research areas and it has been very difficult to measure the mixed up resistance components separately. In this paper, we measured a total resistance of apparatus and regarded it as a serial resistance of contact resistance and length dependant resistance. Measuring the resistance by varying the length of water stream, the variable resistance and fixed contact resistance appear, which are used to calculate the both components of resistances. In addition, the resistance of fire hose can be calculated from the parallel circuit which is formed by grounding the fire hose with the resistance of water stream. Results show that we can successfully measure the resistance per unit length of water stream and fire hose, thereby proving that this method is a facile way to measure water and fire hose resistance. However, many experiments are still required to obtain the precise contact resistance of ground under various condition and the resistance between the human body and fire hose.

An Unequal Power Divider with Adjustable Dividing Ratio (가변 분배 비율 비대칭 전력 분배기)

  • Lim, Jong-Sik;Oh, Seong-Min;Koo, Jae-Jin;Jeong, Yong-Chae;Ahn, Dal
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.5 s.120
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    • pp.478-485
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    • 2007
  • In this paper, an unequal 1:N Wilkinson power divider with adjustable dividing ratio is proposed. The proposed unequal power divider is composed of basic Wilkinson structure. It consists of rectangular-shaped defected ground structure (DGS), isolated island pattern in DGS, and varactor diodes of which capacitance depends on bias voltage. The characteristic impedance value of microstrip line having DGS goes up and down by controlling bias voltage for diodes, and consequently the power dividing ratio(N) is adjusted. The obtained N from measurement is $2.59{\sim}10.4$ which mean the proposed divider has adjustable unequal dividing ratio.

Analysis and Compensation of Current Measurement Error in Digitally Controlled AC Drives (디지털 제어 교류 전동기 구동시스템의 전류 측정 오차 해석 및 보상)

  • 송승호;최종우;설승기
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.5
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    • pp.462-473
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    • 1999
  • This paper addresses the current measurement issue of all digital field oriented control of ac motors. The p paper focuses on the effect of low-pass filter and also on the sampling of the fundamental component of the m motor current. The low-pass filter, which suppresses the switching noise of the motor current, introduces v variable phase delay according to the current ripple frequency. It is shown that the current sampling error c consists of the fundamental component and high frL'quency ripple components. In this paper, the dependency of t this current sampling e$\pi$or on the reference voltage vector is investigated analytically and a sampling technique i is proposed to minimize the error. The work is based on the three phase symmetry pulse width modulation l inverter driving an induction machine. With this technique, the bandwidth of current regulator can be extended t to the limit given by the switching frequency of the inverter and more precise torque regulation is possible.

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A Signal Readout System for CNT Sensor Arrays (CNT 센서 어레이를 위한 신호 검출 시스템)

  • Shin, Young-San;Wee, Jae-Kyung;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.31-39
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    • 2011
  • In this paper, we propose a signal readout system with small area and low power consumption for CNT sensor arrays. The proposed system consists of signal readout circuitry, a digital controller, and UART I/O. The key components of the signal readout circuitry are 64 transimpedance amplifiers (TIA) and SAR-ADC with 11-bit resolution. The TIA adopts an active input current mirror (AICM) for voltage biasing and current amplification of a sensor. The proposed architecture can reduce area and power without sampling rate degradation because the 64 TIAs share a variable gain amplifier (VGA) which needs large area and high power due to resistive feedback. In addition, the SAR-ADC is designed for low power with modified algorithm where the operation of the lower bits can be skipped according to an input voltage level. The operation of ADC is controlled by a digital controller based on UART protocol. The data of ADC can be monitored on a computer terminal. The signal readout circuitry was designed with 0.13${\mu}m$ CMOS technology. It occupies the area of 0.173 $mm^2$ and consumes 77.06${\mu}W$ at the conversion rate of 640 samples/s. According to measurement, the linearity error is under 5.3% in the input sensing current range of 10nA - 10${\mu}A$. The UART I/O and the digital controller were designed with 0.18${\mu}m$ CMOS technology and their area is 0.251 $mm^2$.

A Study on Generating efficiency of the Double Acting Stirling Engine/Generator (양방향 스털링엔진/발전기의 효율 특성 연구)

  • PARK, SEONGJE;KO, JUNSEOK;HONG, YONGJU;KIM, HYOBONG;YEOM, HANKIL;IN, SEHWAN
    • Transactions of the Korean hydrogen and new energy society
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    • v.27 no.1
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    • pp.114-120
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    • 2016
  • This paper describes generating efficiency characteristics of the double acting Stirling engine/generator for domestic small-scale CHP (Combined Heat and Power) system. In small distributed generation applications, Stirling engine has competition from fuel cell, microturbine and etc. In order to be economical in the applications, a long life with minimum maintenance is generally required. Free piston Stirling engine (FPSE) has no crank and rotating parts to generate lateral forces and require lubrication. Double acting Stirling engine/generator has one displacer and two power piston which are supported by flexure springs. Two power pistons oscillate with symmetric displacement and are connected with moving magnet type linear generators for power generation from PV work. In experiments, 1 kW class double acting free piston Stirling engine/generator is fabricated and tested. Heat is supplied to hot end of engine by the combustion of natural gas and converted to electric power by linear generators which are assembled with power pistons. The electric parameters such as voltage, current and phase are measured with for variable flow rate of fuel gas. Especially, generating efficiency of FPSE is measured with three different measurement methods. Generating efficiency of the double acting Stirling engine/alternator is about 24%.

Design of 4th Order ΣΔ modulator employing a low power reconfigurable operational amplifier (전력절감용 재구성 연산증폭기를 사용한 4차 델타-시그마 변조기 설계)

  • Lee, Dong-Hyun;Yoon, Kwang-Sub
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1025-1030
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    • 2018
  • The proposed modulator is designed by utilizing a conventional structure employing time division technique to realize the 4th order delta-sigma modulator using one op-amp. In order to reduce the influence of KT/C noise, the capacitance in the first and second integrators reused was chosen to be 20pF and capacitance of third and fourth integrators was designed to be 1pF. The stage variable technique in the low power reconfigurable op-amp was used to solve the stability issue due to different capacitance loads for the reduction of KT/C noise. This technique enabled the proposed modulator to reduce the power consumption of 15% with respect to the conventional one. The proposed modulator was fabricated with 0.18um CMOS N-well 1 poly 6 metal process and consumes 305uW at supply voltage of 1.8V. The measurement results demonstrated that SNDR, ENOB, DR, FoM(Walden), and FoM(Schreier) were 66.3 dB, 10.6 bits, 83 dB, 98 pJ/step, and 142.8 dB at the sampling frequency of 256kHz, oversampling ratio of 128, clock frequency of 1.024 MHz, and input frequency of 250 Hz, respectively.

Design of Low Power 4th order ΣΔ Modulator with Single Reconfigurable Amplifier (재구성가능 연산증폭기를 사용한 저전력 4차 델타-시그마 변조기 설계)

  • Sung, Jae-Hyeon;Lee, Dong-Hyun;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.5
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    • pp.24-32
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    • 2017
  • In this paper, a low power 4th order delta-sigma modulator was designed with a high resolution of 12 bits or more for the biological signal processing. Using time-interleaving technique, 4th order delta-sigma modulator was designed with one operational amplifier. So power consumption can be reduced to 1/4 than a conventional structure. To operate stably in the big difference between the two capacitor for kT/C noise and chip size, the variable-stage amplifier was designed. In the first phase and second phase, the operational amplifier is operating in a 2-stage. In the third and fourth phase, the operational amplifier is operating in a 1-stage. This was significantly improved the stability of the modulator because the phase margin exists within 60~90deg. The proposed delta-sigma modulator is designed in a standard $0.18{\mu}m$ CMOS n-well 1 poly 6 Metal technology and dissipates the power of $354{\mu}W$ with supply voltage of 1.8V. The ENOB of 11.8bit and SNDR of 72.8dB at 250Hz input frequency and 256kHz sampling frequency. From measurement results FOM1 is calculated to 49.6pJ/step and FOM2 is calculated to 154.5dB.