• 한국전기전자재료학회논문지
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• 제16권9호
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• pp.765-770
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• 2003

We have developed a low-temperature, and low-pressure radical induced oxidation (RIO) technology, so that high-quality ultrathin silicon dioxide layers have been effectively produced with a high reproducibility, and successfully employed to realize high performace SiGe heterostructure complementary MOSFETs (HCMOS) lot the first time. The obtained oxide layer showed comparable leakage and breakdown properties to conventional furnace gate oxides, and no hysteresis was observed during high-frequency capacitance-voltage characterization. Strained SiGe HCMOS transistors with a 2.5 nm-thick gate oxide layer grown by this method exhibited excellent device properties. These suggest that the present technique is particularly suitable for HCMOS devices requiring a fast and high-precision gate oxidation process with a low thermal budget.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권3호
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• pp.203-212
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• 2010

In this paper, we present an analytical model for the first eigen energy level ($E_0$) of the carriers in the inversion layer in present generation MOSFETs, having ultrathin gate oxides and high substrate doping concentrations. Commonly used approaches to evaluate $E_0$ make either or both of the following two assumptions: one is that the barrier height at the oxide-semiconductor interface is infinite (with the consequence that the wave function at this interface is forced to zero), while the other is the triangular potential well approximation within the semiconductor (resulting in a constant electric field throughout the semiconductor, equal to the surface electric field). Obviously, both these assumptions are wrong, however, in order to correctly account for these two effects, one needs to solve Schrodinger and Poisson equations simultaneously, with the approach turning numerical and computationally intensive. In this work, we have derived a closed-form analytical expression for $E_0$, with due considerations for both the assumptions mentioned above. In order to account for the finite barrier height at the oxide-semiconductor interface, we have used the asymptotic approximations of the Airy function integrals to find the wave functions at the oxide and the semiconductor. Then, by applying the boundary condition at the oxide-semiconductor interface, we developed the model for $E_0$. With regard to the second assumption, we proposed the inclusion of a fitting parameter in the wellknown effective electric field model. The results matched very well with those obtained from Li's model. Another unique contribution of this work is to explicitly account for the finite oxide-semiconductor barrier height, which none of the reported works considered.

• 한국광학회:학술대회논문집
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• 한국광학회 2002년도 제13회 정기총회 및 2002년도 동계학술발표회
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• pp.194-195
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• 2002

• E2M - 전기 전자와 첨단 소재
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• 제10권1호
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• pp.26-32
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• 1997

The gate induced drain leakage(GIDL) current under the stress of worse case in -MOSFET's with ultrathin gate oxides has been measured and characterized. The GIDL current was shown that P-MOSFET's of the thicker gate oxide is smaller than that of the thinner gate oxide. It was the results that the this cur-rent is decreased with the increamental stress time at the same devices.It is analyzed that the formation components of GIDL current are both energy band to band tunneling at high gate-drain voltage and energy band to defect tunneling at low drain-gate voltage. The degradations of GIDL current was analyzed the mechanism of major role in the hot carriers trapping in gate oxide by on-state stress.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 춘계 기술심포지움 논문집
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• pp.252-254
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• 2002

Metal oxides with high dielectric constants have the potential to expend scaling of transistor gate capacitance beyond that of ultrathin silicon dioxide. However, during deposition of most metal oxides on silicon, an interfacial region of SiOx is formed and limits the specific capacitance of the gate structure. We deposisted aluminum oxide and examined the composition of the interfacial layer by employing high-resolution X-ray photoelectron spectroscopy and X-ray reflectivity. We find that the interfacial region is not pure SiO$_2$, but is composed of a complex depth-dependent ternary oxide of $AlSi_xO_y$ and the pure SiO$_2$.

• 전자공학회논문지D
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• 제34D권8호
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• pp.26-34
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• 1997

To develop ultrathin gate oxide for ULSI MOSFETs, for the first time, we fabricated MOS capacitors with 65.angs. thick initial oxide grown by high pressure oxidation (HIPOX) at 700.deg. C in 5 atmosphere $O_{2}$ ambient and then followed by rapid thermal nitridation (RTN) in N$_{2}$O ambient. The dielectric breakdown fields of the initial HIPOX oxide are 13.0 MV/cm and 13.8MV/cm for negative and positive gate bias, respectively and are dependent on nitridation temeprature and time.The lifetimes of the HIPOX oxides extractd by TDDB method are 1.1*10$^{8}$ sec and 3.4 * 10$^{9}$ sec for negative and positive stress current, respectively. The lifetime of the HIPOX oxide dfor negative stress current increases with nitridation time in N$_{2}$O ambient at 1100.deg.C, reaching maximum value stress curretn increases with nitridation time in N$_{2}$O ambient at 1100.deg. C reacing maximum value of 1.2*10$^{9}$ sec for 30 sec of nitridation time, and then subsequently decreases at the longer nitridation time. The lifetimes of the nitrided-HIPOX oxides are longer than 10 years when nitridations are carried out longer than about 50 sec and 12 sec at 1000.deg. C, and 1100.deg. C, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.163-166
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• 2002

We investigated structural and electrical properties of Metal-Oxide-Semiconductor(MOS) structure using Hafnium $oxide(HfO_{2})$ as high-k gate dielectric material. $HfO_{2}$ films are ultrathin gate dielectric material witch have a thickness less than 2.0nm， so it is spotlighted to be substituted $SiO_{2}$ as gate dielectric material. In this paper We have grown $HfO_{2}$ films with pt electrode on P-type Silicon substrate by RF magnetron sputtering system using $HfO_{2}$ target and oserved the property of semiconductor-oxide interface. Using pt electrode, it is necessary to be annealed at ${300^{\circ}C}$. This process is to increase an adhesion ratio between $HfO_{2}$ films with pt electrode. In film deposition process, the deposition time of $HfO_{2}$ films is an important parameter. Structura1 properties are invetigated by AES depth profile, and electrical properties by Capacitance-Voltage characteristic. Interface trap density are measured to observe the interface between $HfO_{2}$ with Si using High-frequency(1MHz) C-V and Quasi - static C-V characteristic.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.829-831
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• 1992

Ultrathin metal-oxide-semiconductor(MOS) gate dielectrics have been fabricated by conventional thermal oxidation in $N_2O$ ambient. Compared to oxides grown in $O_2$, $N_2O$ oxides exhibit significantly low flatband voltage and small shift in flatband voltage. $N_2O$ oxidation induces a slight decrease in mobile ionic charge density($N_m$), fixed charge density($N_f$) and surface state charge density($N_{ss}$). This study establishes that $N_2O$ oxides may have a great impact on future MOS ULSI technology in which ultrathin gate dielectrics are required.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 추계학술대회 논문집
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• pp.90-93
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• 1992

In this paper, MOS characteristics of gate dielectrics prepared by furnace oxidation of Si in an $N_2O$ ambient have been studied. Compared with the oxides grown in $O_2$, $N_2O$ oxides show significantly improved breakdown field and low flat band voltage. Also, $N_2O$ oxide is more controllable for ultrathin film growth than $O_2$ oxide. This improvement is caused by nitrogen incorporation into the $N_2O$ oxide. Therefore, the nitrogen-rich-layer at the Si/$SiO_2$ interface formed during $N_2O$ oxidation not only strengthen $N_2O$ oxide structure at the interface and improves the gate dielectric quality, it also acts as a oxidant diffusion barrier that reduces the oxidation rate significantly.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.190-193
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• 2006

we implemented pentacene TFTs able to operate at low voltage less than 2V by using ultrathin Al2O3 layer as a gate insulator. The OTFTs exhibited a mobility of $0.27{\pm}0.05\;cm^2/Vs$, an outstanding subthreshold slope of $0.109{\pm}0.027$, and an on/off current ratio of $2.87{\pm}1.07{\times}10^4$. OTFT operated at low voltage, producing 3.5uA at $V_GS$= 2V and $V_DS$= 1.5V.