• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
• /
• pp.806-808
• /
• 2008

We studied ink-jet printing for selective deposition of soluble oxide semiconductor to fabricate transistor. Sol-gel derived ZTO solution was synthesized for ink-jet printable solution. Transistors were produced by printing oxide layer between ITO electrodes. We demonstrated that ink-jet printed ZTO transistors work well and surface treatment significantly influences device performance.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2001년도 전력전자학술대회 논문집
• /
• pp.698-701
• /
• 2001

Loss analyses of two soft switching techniques for two-transistor forward converters are presented. The sums of snubber conduction and capacitive turn-on losses for two transistors are calculated to compare the losses of two techniques. While the conventional soft switching technique shows the loss difference between two transistors, proposed soft switching technique shows equal as well as lower loss in two transistors.

• 전자공학회논문지A
• /
• 제32A권11호
• /
• pp.63-69
• /
• 1995

A novel programming architecture for antifuse FPGA(Field Programmable Gate Array) is described. This architecture prevents programming transistors from breakdown which occurs due to high voltage across the transistors during antifuse programming. Extra mask and processes can be avoided using this proposed architecture. To reduce the applied voltage across the terminals of programming transistors, different voltage ranges are supplied to vertical and horizontal tracks; between programming voltage Vp and Vp/2 for vertical tracks and between Vp/2 and 0V for horizontal tracks. Therefore, Maximum voltage across the programming transistors is half of the programming voltage and an designated antifuse can be programmed by applying maximum voltage for vertical track and minimum voltage for horizontal track while others are subjected to voltage difference below Vp/2.

• 전기학회논문지
• /
• 제66권9호
• /
• pp.1351-1358
• /
• 2017

In this work, we investigated radiation hardness of GaN-based transistors which are strong candidates for next-generation power electronics. Field effect transistors with three types of gate structures including metal Schottky gate, recessed gate, and p-AlGaN layer gate were fabricated on AlGaN/GaN heterostructure on Si substrate. The devices were irradiated with energetic protons and alpha-particles. The irradiated transistors exhibited the reduction of on-current and the shift of threshold voltage which were attributed to displacement damage by incident energetic particles at high fluence. However, FET operation was still maintained and leakage characteristics were not degraded, suggesting that GaN-based FETs possess high potential for radiation-hardened electronics.

• 대한전기학회논문지:시스템및제어부문D
• /
• 제49권6호
• /
• pp.316-321
• /
• 2000

In this paper, we proposed MBDD(Modified Binary Decision Diagram) as a multi-level logic synthesis method and a vertex of MBDD to NMOS transistors matching. A vertex in MBDD is matched to a set of NMOS transistors. MBDD structure can be achieved through transformation steps from BDD structure. MBDD can represent the same function with less vertices less number of NMOS transistors, consequently capacitance of the circuit can be reduced. Thus the power dissipation can be reduced. We applied MBDD to a full odder and a 4-2compressor. Comparing the 4-2compressor block with other synthesis logic, 31.2% reduction and 19.9% reduction was achieved in numbers of transistors and power dissipation respectively. In this simulation we used 0.8 ${\mu}{\textrm}{m}$ fabrication parameters.

• 센서학회지
• /
• 제8권6호
• /
• pp.434-439
• /
• 1999

집적형 습도센서를 위해 이중게이트 금속을 증착한 차동형 전계효과 트랜지스터를 제조하고 상대습도에 따른 드레인전류 드리프트특성을 조사하였다. 감지소자와 비감지소자의 전류차를 얻기 위해 두 트랜지스터의 종횡비는 250/50으로 같게 하였다. 제조된 습도감지 전계효과 트랜지스터의 표준화된 드레인전류는 상대습도가 30%에서 90%로 증가함에 따라 0.12에서 0.3으로 증가하였다.

• 반도체디스플레이기술학회지
• /
• 제19권2호
• /
• pp.72-76
• /
• 2020

The author demonstrated organic ferroelectric thin-film transistors with ferroelectric materials of P(VDF-TrFE) and an amorphous oxide semiconducting In-Ga-Zn-O channel on the silicon substrates. The organic ferroelectric layers were deposited on an oxide semiconductor layer by Langmuir-Blodgett method and then annealed at 128℃ for 30min. The carrier mobility and current on/off ratio of the memory transistors showed 9 ㎠V^-1s^-1 and 6 orders of magnitude, respectively. We can conclude from the obtained results that proposed memory transistors were quite suitable to realize flexible and werable electronic applications.

• 한국전자파학회지:전자파기술
• /
• 제11권2호
• /
• pp.2-11
• /
• 2000

밀리미터파 회로 제작에 필수적인 능동소자인 고 속 Transistor기술은 반도체 설계 및 공정기술의 발 전으로 급격히 발달하고 있다. 주로 GaAs계나 InP 계 III-V 화합물 반도체를 이용한 고주파 transistor 는 FET기반의 MODFET과 BJT기반의 HBT가 밀 리미터파 대역에서 응용된다. 전통적인 III-V족 반 도체 이외에 SiGe와 GaN 소자 기술 역시 급속한 발전을 이루고 있다. 본 논문에서는 밀리미터파 transistor 기술에 대한 기본적인 내용과 응용 예를 소개한다.

• ETRI Journal
• /
• 제43권5호
• /
• pp.900-908
• /
• 2021

This paper proposes thermometer-code latches having five and six transistors for unidirectional and bidirectional thermometer-code shift-registers, respectively. The proposed latches omit the set and reset transistors by changing from two supply voltage nodes to the set and reset signals in the cross-coupled inverter. They set or reset the data by changing the supply voltage to ground in either of two inverters. They reduce the number of transistors to five and six compared with the conventional thermometer-code latches having six and eight transistors, respectively. The proposed thermometer-code latches were simulated using a 65 nm complementary metal-oxide-semiconductor (CMOS) process. For comparison, the proposed and conventional latches are adapted to the 64 bit thermometer-code shift-registers. The proposed unidirectional and bidirectional shift-registers occupy 140 ㎛² and 197 ㎛², respectively. Their consumption powers are 4.6 ㎼ and 5.3 ㎼ at a 100 MHz clock frequency with the supply voltage of 1.2 V. They decrease the areas by 16% and 13% compared with the conventional thermometer-code shift-register.

• 한국전기전자재료학회논문지
• /
• 제35권2호
• /
• pp.190-193
• /
• 2022

In this work, the effect of sputtering working pressure for the tellurium film and its thin-film transistor was investigated. The transfer characteristics of tellurium thin-film transistors were improved by increasing the working pressure during sputtering process. As increasing working pressure, physical and optical properties of Te films such as crystallinity, transmittance, and surface roughness were improved. Therefore, the improved transfer characteristics of Te thin-film transistors may originate from both improved interface properties between the silicon oxide gate dielectric layer and the tellurium active layer with an improved quality of Te film. In conclusion, the control of working pressure during sputtering would be important for obtaining high-performance tellurium-based thin film transistor