• Title/Summary/Keyword: tin layer

검색결과 474건 처리시간 0.027초

유기발광 다이오드의 정공수송층 두께에 따른 미소 공진 효과의 영향에 관한 연구 (A Study on the Effects of Micro Cavity on the HTL Thicknesses on the Top Emission Organic Light Emitting Diode)

  • 이동운;조의식;성진욱;권상직
    • 반도체디스플레이기술학회지
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    • 제21권1호
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    • pp.91-94
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    • 2022
  • Top emission organic light-emitting diode is commonly used because of high efficiency and good color purity than bottom - emission organic light-emitting device. Unlike BEOLED, TEOLED contain semi-transparent metal cathode. Because of semi-transparent cathode, micro cavity effect occurs in TEOLED. We optimized this effect by changing the thickness of hole injection layer. Device consists of is indium-tin-oxide / N,N'-Di-[(1-naphthyl)-N,N'-diphenyl]-1,1'-biphenyl-4,4'-diamine (x nm) / tris-(8-hydroxyquinoline) aluminum (50nm) / LiF(0.5nm) / Mg:Ag (1:9), and we changed NPB thickness which is used as HTL in our device in order to study how micro cavity effects are changed by optical path. As the results, NPB thickness at 35nm showed the current efficiency of 8.55Cd/A.

게이트절연막의 열처리가 Zinc Tin Oxide 투명 박막트랜지스터의 특성에 미치는 영향 (Annealing Effects of Gate-insulator on the Properties of Zinc Tin Oxide Transparent Thin Film Transistors)

  • 마대영
    • 한국전기전자재료학회논문지
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    • 제28권6호
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    • pp.365-370
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    • 2015
  • Zinc tin oxide transparent thin film transistors (ZTO TTFTs) were fabricated on oxidized $n^+$ Si wafers. The thickness of ~30 nm $Al_2O_3$ films were deposited on the oxidized Si wafers by atomic layer deposition, which acted as the gate insulators of ZTO TTFTs. The $Al_2O_3$ films were rapid-annealed at $400^{\circ}C$, $600^{\circ}C$, $800^{\circ}C$, and $1,000^{\circ}C$, respectively. Active layers of ZTO films were deposited on the $Al_2O_3/SiO_2$ coated $n^+$ Si wafers by rf magnetron sputtering. Mobility and threshold voltage were measured as a function of the rapid-annealing temperature. X-ray photoelectron spectroscopy (XPS) were carried out to observe the chemical bindings of $Al_2O_3$ films. The annealing effects of gate-insulator on the properties of TTFTs were analyzed based on the results of XPS.

고집적 소자용 구리기둥범프 패키징에서 산화문제를 해결하기 위한 방법에 대한 연구 (Method of Solving Oxidation Problem in Copper Pillar Bump Packaging Technology of High Density IC)

  • 정원철;홍상진;소대화;황재룡;조일환
    • 한국전기전자재료학회논문지
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    • 제23권12호
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    • pp.919-923
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    • 2010
  • Copper pillar tin bump (CPTB) was developed for high density chip interconnect technology. Copper pillar tin bumps that have $100{\mu}m$ pitch were introduced with fabrication process using a KM -1250 dry film photoresist (DFR), copper electroplating method and Sn electro-less plating method. Mechanical shear strength measurements were introduced to characterize the bonding process as a function of thermo-compression. Shear strength has maximum value with $330^{\circ}C$ and 500 N thenno-compression process. Through the simulation work, it was proved that when the copper pillar tin bump decreased in its size, it was largely affected by the copper oxidation.

용접 조건이 소형 용기용 Sn 도금 강재의 와이어 심 용접성에 미치는 영향 (Effect of Welding Parameters on Wire Seam Weldability of Tin Coated Steels for Small Containers)

  • 김기철;이기호;이목영
    • Journal of Welding and Joining
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    • 제15권5호
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    • pp.74-83
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    • 1997
  • Effect of welding parameters such as current, speed and electrode pressure on the weld quality of tin coated steels for small containers was discussed in this paper. Welding was performed with low frequency wire seam welding system which was loaded with 1.5mm in diameter copper wire electrode. The welding parameters were monitored at the position close to the welding spot so as to minimize the instrumentation error, and the signals were stored into a digital data acquisition system before analysis. Results showed that critical current for sufficient nugget size increased as the base material thickness increased, while the width of the optimum welding range was reduced. The acceptable welding condition derived from this study was found to be effective within the thickness range of $\pm$10% of the nominal (0.25mm) thickness. Tin coating layer was proved not to affect seriously on the weld quality, i.e. strength and formability, since consumable wire electrode was used in this process. Test results also demonstrated that the welding current was thought to be the most effective parameter to form an acceptable weld, while welding speed or electrode pressure exerted less effect on the nugget formation. However, these two parameters played an important role because the former was related to the nugget overlap interval, and the latter, to the formation of expulsion during welding.

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저분자 화합물을 이용한 유기 전계발광소자의 제작과 특성 연구 (Preparation and Properties of Organic Electroluminescent Devices Using Low Molecule Compounds)

  • 노준서;조중연;유정희;장영철;장호정
    • 마이크로전자및패키징학회지
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    • 제10권1호
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    • pp.1-5
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    • 2003
  • 본 연구에서는 ITO (indium tin oxide)/glass 투명기판 위에 다층구조의 OELD (organic electroluminescent devices) 소자를 진공 열증착법으로 제작하였다. 발광층 재료로서 Alq$_3$(tris-(8-hydroxyquinoline)aluminum)물질을 사용하였고, 정공수송층으로는 TPD (triphenyl-diamine) 및 $\alpha-NPD$를 사용하였다. 정공주입층 재료로서 CuPc (Copper phthalocyanine)를 사용하였다. 또한 QD2(quinacridone2) 물질을 $Alq_3$ 발광층내에 약 $10\AA$ 두께로 증착하여 발광효율 향상을 시도하였다. 제작된 모든 소자의 발광개시전압은 약 7 V 이었으며, 정공수송층으로 TPD 물질대신에 열적안정성이 우수한 $\alpha-NPD$를 사용한 경우 휘도값과 발광효율이 개선되었다. $Alq_3$ 발광층 사이에 QD2 물질을 적층한 소자에서 발광효율은 1.55 lm/W 값을 나타내어 $Alq_3$ 발광층만을 사용한 경우에 비해 약 8배 발광효율이 향상되었다.

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Infinitely high selectivity etching of SnO2 binary mask in the new absorber material for EUVL using inductively coupled plasma

  • Lee, S.J.;Jung, C.Y.;Lee, N.E.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.285-285
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    • 2011
  • EUVL (Extreme Ultra Violet Lithography) is one of competitive lithographic technologies for sub-30nm fabrication of nano-scale Si devices that can possibly replace the conventional photolithography used to make today's microcircuits. Among the core EUVL technologies, mask fabrication is of considerable importance since the use of new reflective optics having a completely different configuration compared to those of conventional photolithography. Therefore new materials and new mask fabrication process are required for high performance EUVL mask fabrication. This study investigated the etching properties of SnO2 (Tin Oxide) as a new absorber material for EUVL binary mask. The EUVL mask structure used for etching is SnO2 (absorber layer) / Ru (capping / etch stop layer) / Mo-Si multilayer (reflective layer) / Si (substrate). Since the Ru etch stop layer should not be etched, infinitely high selectivity of SnO2 layer to Ru ESL is required. To obtain infinitely high etch selectivity and very low LER (line edge roughness) values, etch parameters of gas flow ratio, top electrode power, dc self - bias voltage (Vdc), and etch time were varied in inductively coupled Cl2/Ar plasmas. For certain process window, infinitely high etch selectivity of SnO2 to Ru ESL could be obtained by optimizing the process parameters. Etch characteristics were measured by on scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS) analyses. Detailed mechanisms for ultra-high etch selectivity will be discussed.

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시안기를 가진 유기 EL 물질들의 합성 및 유기 EL 소자에서의 발광특성평가 (Synthesis of Organic EL Materials with Cyano Group and Evaluation of Emission Characteristics in Organic EL Devices)

  • 김동욱
    • 대한화학회지
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    • 제43권3호
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    • pp.315-320
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    • 1999
  • 고성능 전계발광(electroluminescent, EL) 소자에 사용되는 발광물질의 개발을 위하여 설계된 발광기능기의 분자구조는 비스스틸렌구조의 발광기능기에 전자주입과 수송을 위한 시안기와 정공주입과 수송을 위한 페닐아민기를 가진 구조이다. 위의 발광기능기로 구성 된 고분자물질, PU-BCN과 저분자물질, D-BCN을 합성하였다. PU-BCN과 D-BCN을 발광층으로 사용하여 만들어진 단층형 소자(SL)의 구조는 Indium-tin oxide(ITO)/발광층/MgAg이고, 적층형소자의 구조는 ITO/발광층/oxadiazole dehvative/MgAg, (DL-E)와 ITO/tri-phenylamine derivative/발광층/MgAg,(DL-H)의 두 종류이다. 동일한 발광기능기를 가진 고분자 발광물질, PU-BCN과 저분자발광물질, D-BCN은 전하주입과 수송성이 띄어난 물질로 평가되었으며, 두 발광물질들은 높은 전류밀도하에서 거의 동일한 발광특성을 보였다. 발광물질들의 최대 발광 피이크는 약 640 nm의 적색 발광영역에서 측정되었다.

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전기저항형 금속산화물 센서의 인쇄공정 최적화에 관한 연구 (Optimization of Printing Process for the Development of Metal-oxide Resistivity Sensor)

  • 이석환;구지은;이문진;정정열;장지호
    • 한국전기전자재료학회논문지
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    • 제29권6호
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    • pp.353-358
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    • 2016
  • In this paper, we have studied about the optimum fabrication condition of the printed Indium Tin Oxide (ITO) layers for the electrical resistance-type sensor application. We have investigated on the substrates surface treatments, mixing ratio of organic binder/ITO powder, and viscosity of the printing paste to determine the optimum condition of the screen printed ITO layer. Also, we found that the printing condition is closely related with the sensor performance. To know the feasibility of printed ITO layer as an electrical resistance-type sensor, we have fabricated the ITO sensors with a printed and sputtered ITO layers. The printed ITO films revealed $10^2$ times higher sensitivity than the sputtered ITO layer. Also, the sputtered ITO layer exhibited an operating temperature of $127^{\circ}C$ at the operating voltage of 5 V. While, in case of the printed ITO layer showed the operating temperature of $27.6^{\circ}C$ in high operating voltage of 30 V. We found that the printed ITO layer is suitable for the various sensor applications.

Role of a PVA layer During lithography of SnS2 thin Films Grown by Atomic layer Deposition

  • Ham, Giyul;Shin, Seokyoon;Lee, Juhyun;Lee, Namgue;Jeon, Hyeongtag
    • 반도체디스플레이기술학회지
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    • 제17권3호
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    • pp.41-45
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    • 2018
  • Two-dimensional (2D) materials have been studied extensively due to their excellent physical, chemical, and electrical properties. Among them, we report the material and device characteristics of tin disulfide ($SnS_2$). To apply $SnS_2$ as a channel layer in a transistor, $SnS_2$ channels were formed by a stripping method and a transfer method. The limitation of this method is that it is difficult to produce uniform device characteristics over a large area. Therefore, we directly deposited $SnS_2$ by atomic layer deposition (ALD) and then performed lithography. This method was able to produce devices with repeatable characteristics over a large area. However, the $SnS_2$ film was damaged by the acetone used as a photoresist (PR) developer during the lithography process, with the electrical properties of mobility of $2.6{\times}10^{-4}cm^2/Vs$, S.S. of 58.1 V/decade, and on/off current ratio of $1.8{\times}10^2$. These results are not suitable for advanced electronic devices. In this study, we analyzed the effect of acetone on $SnS_2$ and studied the device process to prevent such damage. Using polyvinyl alcohol (PVA) as a passivation layer during the lithography process, the electrical characteristics of the $SnS_2$ transistor had $2.11{\times}10^{-3}cm^2/Vs$ of mobility, 11.3 V/decade of S.S, and $2.5{\times}10^3$ of the on/off current ratio, which were 10x improvements to the $SnS_2$ transistor fabricated by the conventional method.

고분자 기판의 휨 스트레스에 대한 Encapsulation층의 효과 (The Effect of Encapsulation Layer Incorporated into Polymer Substrates for Bending Stress)

  • 박준백;서대식;이상극;이준웅;김영훈;문대규;한정인
    • 한국전기전자재료학회논문지
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    • 제17권4호
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    • pp.443-447
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    • 2004
  • In this study, we investigated the necessity of encapsulation layer to maximize flexibility of brittle indium-tin-oxide (ITO) on polymer substrates. And, Young's modulus (E) of encapsulation layer han a significant effect on external bending stress and the coefficient of thermal expansion (CTE) of that han a significant effect on internal thermal stress. To compare the magnitude of total mechanical stress including both bending stress and thermal stress, the mechanical stress of triple-layer structure (substrate / ITO / encapsulation layer or substrate / buffer layer / ITO) can be quantified and numerically analyzed through the farthest cracked island position. As a result, it should be noted that multi-layer structures with more elastic encapsulation material have small mechanical stress compared to that of buffer and encapsulation structure of large Young's modulus material when they were externally bent.