• Title/Summary/Keyword: threshold effect

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Effect of Hafnium Oxide on ALD Grown ZnO Thin Film Transistor

  • Choi, Woon-Seop
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.211-213
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    • 2008
  • The TFTs from ZnO semiconductor with hafnium oxide dielectrics were prepared by atomic layer deposition to characterize the electrical properties. Good electrical properties of oxide TFT was obtained with channel mobility of $2.1\;cm^2/Vs$, threshold voltage of 0 V, the subthreshold slope of 0.9 V/dec, and on to off current ratio of $10^6$.

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A study on the degradation by the hot carrier trapping of the submicron MOSFET with long stress condition (장시간 스트레스 조건에서 submicron MOSFET의 열전자 트래핑에 의한 노화현상에 대한 연구)

  • 홍순석
    • Electrical & Electronic Materials
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    • v.8 no.3
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    • pp.357-361
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    • 1995
  • An experiment on characteristics of nMOSFET's in the long stress condition with the maximum of the substrate current has been carried out in order to study on the degradation due to the hot-carrier effect. Based on the measured result of the threshold voltage, the damage is mostly due to the hole injection into the oxide. After long stress, it was shown that the drain current increased at low gate voltages and hence decreased at high gate voltages.

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FinFET for Terabit Era

  • Choi, Yang-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.1
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    • pp.1-11
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    • 2004
  • A FinFET, a novel double-gate device structure is capable of scaling well into the nanoelectronics regime. High-performance CMOS FinFETs , fully depleted silicon-on-insulator (FDSOI) devices have been demonstrated down to 15 nm gate length and are relatively simple to fabricate, which can be scaled to gate length below 10 nm. In this paper, some of the key elements of these technologies are described including sub-lithographic pattering technology, raised source/drain for low series resistance, gate work-function engineering for threshold voltage adjustment as well as metal gate technology, channel roughness on carrier mobility, crystal orientation effect, reliability issues, process variation effects, and device scaling limit.

ANALYSIS OF A QUEUEING SYSTEM WITH OVERLOAD CONTROL BY ARRIVAL RATES

  • CHOI DOO IL
    • Journal of applied mathematics & informatics
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    • v.18 no.1_2
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    • pp.455-464
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    • 2005
  • In this paper, we analyze a queueing system with overload control by arrival rates. This paper is motivated by overload control to prevent congestion in telecommunication networks. The arrivals occur dependent upon queue length. In other words, if the queue length increases, the arrivals may be reduced. By considering the burstiness of traffics in telecommunication networks, we assume the arrival to be a Markov-modulated Poisson process. The analysis by the embedded Markov chain method gives to us the performance measures such as loss and delay. The effect of performance measures on system parameters also is given throughout the numerical examples.

A New Annealing Method. (새로운 Annealing 방법)

  • Hong, Soon-Kwan;Park, Sun-Woo;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.367-369
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    • 1988
  • We suggest a new annealing method for stabilization of $Si-SiO_2$ interface state in MOS device using $NH_3$(10%) + $N_2$(90%) ambient gases. The annealing effect was examined through C-V characteristics, threshold voltage, effective mobility on channel, respectively. The experimental result show that the new method is available to improvement of MOS device characteristics.

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The Delay time of CMOS inverter gate cell for design on digital system (디지털 시스템설계를 위한 CMOS 인버터게이트 셀의 지연시간)

  • 여지환
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2002.06a
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    • pp.195-199
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    • 2002
  • This paper describes the effect of substrate back bias of CMOS Inverter. When the substrate back bias applied in body, the MOS transistor threshold voltage increased and drain saturation current decreased. The back gate reverse bias or substrate bias has been widely utilized and the following advantage has suppressing subthreshold leakage, lowering parasitic junction capacitance, preventing latch up or parasitic bipolar transistor, etc. When the reverse voltage applied substrate, this paper stimulated the propagation delay time CMOS inverter.

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Metal Drilling using Amplitude Modulated Laser Pulse (AM 변조된 레이저 펄스를 이용한 금속 Drilling)

  • Kim, Ho-Seong
    • Proceedings of the KIEE Conference
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    • 1994.07b
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    • pp.1210-1212
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    • 1994
  • An amplitude modulation technique for increasing the laser penetration efficiency for metals has been studied. By chopping electro-optically Nd:YAG laser pulse, the threshold energy for reliable hole drilling was decreased significantly and the penetration depth was increased. It was observed that the effect of chopping was optimal at 8-12 kHz with 60% duty cycle. It is believed that this improvement is due to an increase in the vapor recoil pressure and reduced plasma screening.

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Back-Gate Bias Effect of Ultra Thin Film SOI MOSFET's (초 박막 SOI MOSFET's 의 Back-Gate Bias 효과)

  • 이제혁;변문기;임동규;정주용;이진민
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.485-488
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    • 1999
  • In this paper, the effects of back-gate bias on n-channel SOI MOSFETs has been systematically investigated. Back-gate surface is accumulated when negative bias is applied. It is found that the driving current ability of SOI MOSFETs is reduced because the threshold voltage and subthreshold slope are increased and transconductance is decreased due to the hole accumulation in Si body.

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Wavelet-based Image Denoising with Optimal Filter

  • Lee, Yong-Hwan;Rhee, Sang-Burm
    • Journal of Information Processing Systems
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    • v.1 no.1 s.1
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    • pp.32-35
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    • 2005
  • Image denoising is basic work for image processing, analysis and computer vision. This paper proposes a novel algorithm based on wavelet threshold for image denoising, which is combined with the linear CLS (Constrained Least Squares) filtering and thresholding methods in the transform domain. We demonstrated through simulations with images contaminated by white Gaussian noise that our scheme exhibits better performance in both PSNR (Peak Signal-to-Noise Ratio) and visual effect.

The effect of the new stopping criterion on the genetic algorithm performance

  • Kaya, Mustafa;Genc, Asim
    • Computers and Concrete
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    • v.27 no.1
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    • pp.63-71
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    • 2021
  • In this study, a new stopping criterion, called "backward controlled stopping criterion" (BCSC), was proposed to be used in Genetic Algorithms. In the study, the available stopping citeria; adaptive stopping citerion, evolution time, fitness threshold, fitness convergence, population convergence, gene convergence, and developed stopping criterion were applied to the following four comparison problems; high strength concrete mix design, pre-stressed precast concrete beam, travelling salesman and reinforced concrete deep beam problems. When completed the analysis, the developed stopping criterion was found to be more accomplished than available criteria, and was able to research a much larger area in the space design supplying higher fitness values.