• Title/Summary/Keyword: thin wafer

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Effects of Wafer Warpage on the Misalignment in Wafer Level Stacking Process (웨이퍼 레벨 적층 공정에서 웨이퍼 휘어짐이 정렬 오차에 미치는 영향)

  • Shin, Sowon;Park, Mansoek;Kim, Sarah Eunkyung;Kim, Sungdong
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.3
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    • pp.71-74
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    • 2013
  • In this study, the effects of wafer warpage on the misalignment during wafer stacking process were investigated. The wafer with $45{\mu}m$ bow height warpage was purposely fabricated by depositing Cu thin film on a silicon wafer and the bonding misalignment after bonding was observed to range from $6{\mu}m$ to $15{\mu}m$. This misalignment could be explained by a combination of $5{\mu}m$ radial expansion and $10{\mu}m$ linear slip. The wafer warpage seemed to be responsible for the slip-induced misalignment instead of radial expansion misalignment.

Hillock Behavior on Aluminum Thin Films Deposited on Polymide Film (Polymide 박막상에 증착된 알루미늄 박막의 Hillock거동)

  • Gang, Yeong-Seok
    • Korean Journal of Materials Research
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    • v.8 no.9
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    • pp.802-806
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    • 1998
  • polyimide를 입힌 SiO2 wafer상에 증착된 알루미늄 박막의 두께 및 소둔 여부에 따른 hillock의 거동을 atomic force microscopy (AFM)을 이용하여 분석하였다. 증착된 상태의 박막에서 성장 hillock이 관찰되었으며 박막 두께가 증가할수록 hillock의 크기는 증가한 반면 밀도는 감소하였다. 소둔 후 hillock의 평균 크기는 증가하였으나 밀도는 감소하였다. 이러한 hillock 밀도의 감소는 견고한 wafer상에 직접 증착된 알루미늄 박막에서와 다르다. 이는 유연한 polymide 박막에 의한 응력 완화로 응력유기 입계확산이 이루어지지 않아 hillock 이 추가로 형성되지 않은 상태에서 큰 hillock이 성장하면서 작은 hillock을 흡수하기 때문으로 판단된다.

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Polysilicon Thin Film Transistors on spin-coated Polyimide layer for flexible electronics

  • Pecora, A.;Maiolo, L.;Cuscuna, M.;Simeone, D.;Minotti, A.;Mariucci, L.;Fortunato, G.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.261-264
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    • 2007
  • We developed a non self-aligned poly-silicon TFTs fabrication process at two different temperatures on spin-coated polyimide layer above Si-wafer. After TFTs fabrication, the polyimide layer was mechanically released from the Si-wafer and the devices characteristics were compared. In addition self-heating and hot-carrier induced instabilities were analysed.

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Analysis of Chemically and Thermally Induced Residual Stresses in Polymeric Thin Film

  • Lee, Sang Soon
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.1
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    • pp.1-5
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    • 2015
  • This paper deals with the residual stresses developed in an epoxy film deposited on Si wafer. First, chemically induced residual stresses due to the volumetric shrinkage in cross-linking resins during polymerization are treated. The curvature measurement method is employed to investigate the residual stresses. Then, thermally induced stresses are investigated along the interface between the epoxy film and Si wafer. The boundary element method is employed to investigate the whole stresses in the film. The singular stress is observed near the interface corner. Such residual stresses are large enough to initiate interface delamination to relieve the residual stresses.

Determination of temperature and flux variations during ultra-thin InGaN quantum well growth on a 2" wafer for GaN Green LED

  • Kim, Hyo-Jeong;Kim, Min-Ho;Jeong, Hun-Yeong;Lee, Hyeon-Hwi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.149-149
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    • 2010
  • The origin of the inhomogeneous distribution of photoluminescence (PL) peak wavelength on a commercial 2" GaN wafer for green light emitting diode has been investigated by wide momentum transfer (Q) range x-ray diffraction (XRD) profile of InGaN/GaN multiple quantum wells. Near the GaN (0004) Bragg peak, wide-Q range XRD (${\Delta}Q$ > $1.4{\AA}-1$) was measured along the growth direction. Wide-Q XRD gives precise and direct information of ultra-thin InGaN quantum well structure. Based on the QW structural information, the variation of PL spectra can be explained by the combined effect of temperature gradient and slightly uneven flow of atomic sources during the QW growth. In narrow variations of indium composition and thickness of QW, an effective indium composition can be a good character to match structural data to PL spectra.

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Optical and Electrical Properties of $Ti_xSi_{1-x}O_y$ Films

  • Lim, Jung-Wook;Yun, Sun-Jin;Kim, Je-Ha
    • ETRI Journal
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    • v.31 no.6
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    • pp.675-679
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    • 2009
  • $Ti_xSi_{1-x}O_y$ (TSO) thin films are fabricated using plasma-enhanced atomic layer deposition. The Ti content in the TSO films is controlled by adjusting the sub-cycle ratio of $TiO_2$ and $SiO_2$. The refractive indices of $SiO_2$ and $TiO_2$ are 1.4 and 2.4, respectively. Hence, tailoring of the refractivity indices from 1.4 to 2.4 is feasible. The controllability of the refractive index and film thickness enables application of an antireflection coating layer to TSO films for use as a thin film solar cell. The TSO coating layer on an Si wafer dramatically reduces reflectivity compared to a bare Si wafer. In the measurement of the current-voltage characteristics, a nonlinear coefficient of 13.6 is obtained in the TSO films.

Elctrical Properties of DLPC Lipid Membrane Fabricated on the Silicon Wafer (실리콘 웨이퍼 위에 제작된 DLPC 지질막의 전기적특성)

  • 이우선;김충원;이강현;정용호;김남오;김상용
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.12
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    • pp.1115-1121
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    • 1998
  • MLS capacitor with lipid ultra thin films were deposited by Langmuir-Blodgett (LB) method on the silicon wafer. The current versus voltage and capacitance versus voltage relationships are depend on the applied voltage, electrode area and electrode materials. LB films deposited were made of L-$\alhpa$-DLPC, the 1 layer’s thickness of 35${\AA}$ was measured by ellipsometer. And MLS capacitor with different electrode materials, the work function of these materials was investigated to increase the leakage current. The result indicated the lower leakage current and very high saturation value of capacitance was reached within 700-800 pF when the two electrode was Ag. And $\varepsilon$1, $\varepsilon$2 versus photon energy showed good film formation.

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Aluminum Oxide Photonic Crystals Fabricated on Compound Semiconductor (화합물 반도체 기판 위에 제작된 산화 알루미늄 광결정 특성)

  • Choi, Jae-Ho;Kim, Keun-Joo;Jung, Mi;Woo, Duk-Ha
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.77-78
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    • 2006
  • We fabricated photonic crystals on GaAs and GaN substrates. After anodizing the aluminium thin film in electrochemical embient, the porous alumina was implemented to the mask for reactive ion beam etching process of GaAs wafer. And photonic crystals in GaN wafer were also fabricated using electron beam nano-lithography process. The coated PMMA thin film with 200 nm-thickness on GaN surface was patterned with triangular lattice and etched out the GaN surface by the inductively coupled plasma source. The fabricated GaAs and GaN photonic crystals provide the enhanced intensities of light emission for the wavelengths of 858 and 450 nm, respectively. We will present the detailed dimensions of photonic crystals from SEM and AFM measurements.

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A Study on the Fluxless Bonding of Si-wafer/Solder/Glass Substrate (Si 웨이퍼/솔더/유리기판의 무플럭스 접합에 관한 연구)

  • ;;;N.N. Ekere
    • Journal of Welding and Joining
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    • v.19 no.3
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    • pp.305-310
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    • 2001
  • UBM-coated Si-wafer was fluxlessly soldered with glass substrate in $N_2$ atmosphere using plasma cleaning method. The bulk Sn-37wt.%Pb solder was rolled to the sheet of $100\mu\textrm{m}$ thickness in order to bond a solder disk by fluxless 1st reflow process. The oxide layer on the solder surface was analysed by AES(Auger Electron Spectroscopy). Through rolling, the oxide layer on the solder surface became thin, and it was possible to bond a solder disk on the Si-wafer with fluxless process in $N_2$ gas. The Si-wafer with a solder disk was plasma-cleaned in order to remove oxide layer formed during 1st reflow and soldered to glass by 2nd reflow process without flux in $N_2$ atmosphere. The thickness of oxide layer decreased with increasing plasma power and cleaning time. The optimum plasma cleaning condition for soldering was 500W 12min. The joint was sound and the thicknesses of intermetallic compounds were less than $1\mu\textrm{m}$.

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Reduction of surface roughness during high speed thinning of silicon wafer

  • Heo, W.;Ahn, J.H.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.392-392
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    • 2010
  • In this study, high-speed chemical dry thinning process of Si wafer and evolution of surface roughness were investigated. Direct injection of NO gas into the reactor during the supply of F radicals from $NF_3$ remote plasmas was very effective in increasing the Si thinning rate due to the NO-induced enhancement of surface reaction but thinned Si surface became roughened significantly. Addition of Ar gas, together with NO gas, decreased root mean square (RMS) surface roughness of thinned Si wafer significantly. The process regime for the thinning rate enhancement with reduced surface roughness was extended at higher Ar gas flow rate. Si wafer thinning rate as high as $22.8\;{\mu}m/min$ and root-mean-squared (RMS) surface roughness as small as 0.75 nm could be obtained. It is expected that high-speed chemical dry thinning process has possibility of application to ultra-thin Si wafer thinning with no mechanical damage.

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