• Journal of the Korean Mathematical Society
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• v.31 no.3
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• pp.439-456
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• 1994

Let $\tau$ be a given hereditary torsion theory for left R-module category R-Mod. The class of all $\tau$-torsion left R-modules, denoted by T is closed under homomorphic images, submodules, direct sums and extensions. And the class of all $\tau$-torsionfree left R-modules, denoted by $F$, is closed under submodules, injective hulls, direct products, and isomorphic copies ([3], Proposition 1.7 and 1.10).

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1374-1376
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• 2005

In driving for the electronic ballast lamp which higher quality and performance according to it's frequency which can be critically in Fluorescent Lamp in reliability to the external oscillation electronic ballast module. For the Fluorescent Lamp I cheesed the high frequency T5 lamp that is outstanding in the EU market.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.11a
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• pp.23-24
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• 2010

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.546-548
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• 2019

Due to environmental problems, fossil fuel and nuclear power generation are declining and solar power generation is increasing. DC are of a solar power plant is accidents caused by accidents, causing damage to property and people. This study prevents DC are accidents of solar power modules. It is expected that the IoT will be used to quickly alert the manager and greatly contribute to fire prevention.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.9
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• pp.707-714
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• 2013

IoT, which can be regarded as an enhanced version of M2M communication technology, was proposed to realize intelligent thing to thing communications by utilizing Internet connectivity. Things in IoT are generally heterogeneous and resource constrained. Also such things are connected with each other over LLN(low power and lossy Network). Confidentiality, mutual authentication and message origin authentication are required to make a secure service in IoT. Security protocols used in traditional IP Networks cannot be directly adopted to resource constrained devices in IoT. Under the respect, a IETF standard group proposes to use lightweight version of DTLS protocol for supporting security services in IoT environments. However, the protocol can not cover up all of very constrained devices. To solve the problem, we propose a scheme which tends to support mutual authentication and session key agreement between devices that contain only a single crypto primitive module such as hash function or cipher function because of resource constrained property. The proposed scheme enhances performance by pre-computing a session key and is able to defend various attacks.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1256-1267
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• 2016

Distributed stray inductance exerts a significant influence on the turn-off voltages of power switching devices. Therefore, the design of low stray inductance bus bars has become an important part of the design of high-power converters. In this study, we first analyze the operational principle and switching transient of a T-type converter. Then, we obtain the commutation circuit, categorize the stray inductance of the circuit, and study the influence of the different types of stray inductance on the turn-off voltages of switching devices. According to the current distribution of the commutation circuit, as well as the conditions for realizing laminated bus bars, we laminate the bus bar of the converter by integrating the practical structure of a capacitor bank and a power module. As a result, the stray inductance of the bus bar is reduced, and the stray inductance in the commutation circuit of the converter is reduced to more than half. Finally, a 10 kVA experimental prototype of a T-type converter is built to verify the effectiveness of the designed laminated bus bar in restraining the turn-off voltage spike of the switching devices in the converter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.274-283
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• 2014

In this paper, the epi layer of npn SOI HBT with n+ buried layer has been studied through Sentaurus process and device simulator. The doping value of the deposited epi layer has been varied for the npn HBT to achieve improved $f_tBV_{CEO}$ product (397 GHzV). As the $BV_{CEO}$ value is higher for low value of epi layer doping, higher supply voltage can be used to increase the $f_t$ value of the HBT. At 1.8 V $V_{CE}$, the $f_tBV_{CEO}$ product of HBT is 465.5 GHzV. Further, the film thickness of the epi layer of the SOI HBT has been scaled for better performance (426.8 GHzV $f_tBV_{CEO}$ product at 1.2 V $V_{CE}$). The addition of this HBT module to fully depleted SOI CMOS technology would provide better solution for realizing wireless circuits and systems for 60 GHz short range communication and 77 GHz automotive radar applications. This SOI HBT together with SOI CMOS has potential for future high performance SOI BiCMOS technology.

• Transactions of the Korean Society of Mechanical Engineers
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• v.9 no.5
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• pp.572-578
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• 1985

A composite gear with involute-circular are tooth profile and a tooth profile of the rack to cut this gear are theoretictically obtained. The composite gear has involute tooth profile in the vicinity of pitch point and has circular arc tooth profiles at addendum adn dedendum. The contact ratio(M$_{c}$), chordal tooth thickness (chordal tip tooth thickness S$_{t}$, chordal root tooth thickness S$_{t}$) of the composite gear are compared with those of involute gear. When module, number of teeth and pressure angle eqaul, S$_{t}$ of composite gear is much larger than that of involute gear. Under the same conditions, S/sib t/ and M$_{c}$ of composite gear become smaller than those of involute gear.lute gear.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.67 no.1
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• pp.9-14
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• 2018

In this paper, we introduce an AES-based security chip for the embedded system of Internet of Things(IoT). We used Verilog HDL to implement the AES algorithm in FPGA. The designed AES module creates 128-bit cipher by encrypting 128-bit plain text and vice versa. RTL simulations are performed to verify the AES function and the theory is compared to the results. An FPGA emulation was also performed with 40 types of test sequences using two Altera DE0-Nano-SoC boards. To evaluate the performance of security algorithms, we compared them with AES implemented by software. The processing cycle per data unit of hardware implementation is 3.9 to 7.7 times faster than software implementation. However, there is a possibility that the processing speed grow slower due to the feature of the hardware design. This can be solved by using a pipelined scheme that divides the propagation delay time or by using an ASIC design method. In addition to the AES algorithm designed in this paper, various algorithms such as IPSec can be implemented in hardware. If hardware IP design is set in advance, future IoT applications will be able to improve security strength without time difficulties.

• Journal of the Korea Society of Computer and Information
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• v.20 no.2
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• pp.1-10
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• 2015

In this paper, we propose a new multiplication algorithm for primitive polynomial with all 1 of coefficient in case that m is odd and even on finite fields $GF(3^m)$, and design the multiplier with parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $(m+1)^2$ same basic cells. Since the basic cells have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $T_A+T_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.