• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.1-6
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• 2009

Due to the different camera properties of the multi-view camera system, the color properties of captured images can be inconsistent. This inconsistency makes post-processing such as depth estimation, view synthesis and compression difficult. In this paper, the method to correct the different color properties of multi-view images is proposed. We utilize a gray gradient bar on a display device to extract the color sensitivity property of the camera and calculate a look-up table based on the sensitivity property. The colors in the target image are converted by mapping technique referring to the look-up table. Proposed algorithm shows the good subjective results and reduces the mean absolute error among the color values of multi-view images by 72% on average in experimental results.

• Journal of the Korea Institute of Military Science and Technology
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• v.19 no.4
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• pp.492-499
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• 2016

Null pattern synthesis method using the Quantum-inspired Evolutionary Algorithm(QEA) is described in this study. A $12{\times}12$ planar array antenna is considered and each element of the array antenna is controlled by 6-bit phase shifter. The maximum number of iteration of 500 is used in simulation and the rotation angle for updating Q-bit individuals is determined to make the individual converge to the best solution and is summarized in a look-up table. In this study we showed that QEA can satisfactorily synthesize the null pattern using smaller number of individuals compared with the conventional Genetic Algorithm.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.177-185
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• 1996

This paper describes several algorithms for technolgoy mapping of logic functions into interesting and popular FPGAs that use look-up table memories. In order to improved the technology mapping for FPGA, some existing multi-level logic synthesis, decomposition reduction and packing techniques are analyzed and compared. And then new algorithms such as merging fanin, unified reduction and multiple disjoint decomposition which are used for combinational logic design, are proposed. The cost function is used to minimize the number of CLBs and edges of the network. The cost is a linear combination of each weight that is given by user. Finally we compare our new algorithm with previous logic design technique. In an experimental comparison our algorithm requires 10% fewer CLB and nets than SIS-pga.

• Journal of the Korean Institute of Telematics and Electronics
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• v.12 no.2
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• pp.24-27
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• 1975

A Synthesis method for multiple-input change transition-sensitive asynchronous sequential circuits is proposed. Both internal states and output states are synthesized from primitive flow tables. It is Btown that cur realization is faster than that of Chuang's. It is pointed out that Chuang's realization of output states contains malfunctions. In this paper, output stales are easily realized from primitive flaw table by the method of controlled excitation.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.32 no.7
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• pp.247-253
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• 1983

Cauer and Foster type LC networks being examined, table for illustration is presented. This paper presents a thoerem to determine and generate the exact number of LC equivalent networks obtained by combining Cauer and Foster type. By combining Cauer and foster type, one can construct greater number of canonic equivalent networks than is obtainable through use of Cauer type alone. Furthermore, the number of equivalent networks is rapidly increased with increased with increasing the order. An illustrative example is provided to confirm the proposed theorem. This theouem is easily applied to RC and RL cases.

• Journal of information and communication convergence engineering
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• v.6 no.1
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• pp.47-50
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• 2008

A novel high channel efficiency transceiver based on a fast acquisition frequency synthesizer has been designed. The direct digital synthesis (DDS) technique is applied and a simple memory look-up table is incorporated to expedite channel acquisition. The technique simplifies the frequency control process in the transceiver and thus reduces the channel switching time. As a result, the channel efficiency is improved. The designed transceiver is ideal for frequency hopping mobile communication applications.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.7
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• pp.799-806
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• 1988

This paper deals with the teletext systems with processing the Hangul which is compatible with the NABTS. The Hangul set was included in the graphic-set repertory of the 7bit in-use table and the synthesis method was used to process the Hangul codes. The Hangul in the Teletext systems by the NABTS is possible to use DRCS method, but the transmission delay problem has occurred in that case. As a result, all the programs within the NABTS format are possible to use without any modifications in this systems.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.355-358
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• 2000

In this paper we propose procedures to enhance testability by modifying state transition tables. In these procedures, transitions about undefined states, which are not described in state transition tables but exist in a synthesized gate level circuit, are added to a state transition table. Experimental results for MCNC benchmarks are shown.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.37 no.5
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• pp.54-63
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• 2000

In this paper, we implemented cyber character that can do speech recognition, speech synthesis, Motion tracking and 3D animation. For speech recognition, we used Discrete-HMM algorithm with K-means 128 level vector quantization and MFCC feature vector. For speech synthesis, we used demi-syllables TD-PSOLA algorithm. For PC based Motion tracking, we present Fast Optical Flow like Method. And for animating 3D model, we used vertex interpolation with DirectSD retained mode. Finally, we implemented cyber character integrated above systems, which game calculating by the multiplication table with user and the cyber character always look at user using of Motion tracking system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.12 s.91
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• pp.1161-1167
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• 2004

The conventional PLL(phase locked loop) frequency synthesizer takes a long switching time because of the inherent closed-loop structure. The digital hybrid PLL(DH-PLL) which includes the open-loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates in high speed, but the hardware complexity and power consumption are the serious problem because the DLT(digital look-up table) is usually implemented by the ROM which contains the transfer characteristic of VCO(voltage controlled oscillator). This paper proposes a new DH-PLL using a very simple DLT-replacement digital logic instead of the complex ROM-type DLT. Also, a timing synchronization circuit for the very small over-shoot and shorter settling time is designed for the ultra fast switching speed at every frequency synthesis. The hardware complexity gets decreased to about $28\%,$ as compared with the conventional DH-PLL. The high speed switching characteristic of the frequency synthesis process can be verified by the computer simulation and the circuit implementation.