• Journal of the Korean Magnetics Society
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• v.11 no.5
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• pp.222-225
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• 2001

The planar type inductors have a good potential for the application of miniaturized low power DC-DC converters. For those high quality application, the reduction of coil loss and also magnetic films which have good high frequency properties are required. Fabricated inductor was consisted of FeTaN/Ti magnetic film and electroplated Cu coil thickness of 100$\mu\textrm{m}$ and $SiO_2$ as a insulating layer. The inductor was designed double rectangular spiral shape for magnetic field highly confining within the device. The measured value of inductance and resistance were 980 nH and 1.7 $\Omega$ at 1 MHz as operating frequency of device. The Q factor is 3.55 at 1 MHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.38-38
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• 2008

무선 통신에 사용되는 기판에서 passive device는 대부분 기판 위에 개별적으로 표면 실장 되고 있으며 전체 기판면적에 80% 정도를 차지하고 있다. 따라서 기판의 소형화, 경량화를 위하여 많은 면적을 차지하는 수동소자들을 다층인쇄회로기판(multi-layer circuit board)에 내장하는 내장형 수동소자(embedded passive device) 기술이 연구되고 있다. 본 연구원에서 개발한 복합재료는 무기물 충전제 $SrTiO_3$를 사용하였으며, 열가소성 수지로는 cyclo-olefin-polymer계열의 수지를 바탕으로 제작 하였고, 유전율7~7.5이고 유전손실은 0.0045이다. 또한 $SrTiO_3$/유기물 복합재료는 공정온도가 낮고 경제적인 유기물에 높은 유전상수를 갖는 무기물이 분산되어 있는 형태이며, 우수한 유전 특성, 화학적 안정성, 저온 제조공정, 제조단가의 감소, 패키징 크기의 감소 등의 장점을 갖는다. 개발된 재료를 기반으로 Multi-layer 구조를 이용한 다양한 용량대의 capacitor를 구현 하였으며, spiral inductor 와 내장형 spiral inductor를 구현하여 다양한 용량대의 inductor를 구현 하였다. 그리고 각각의 구조에 따른 inductance와 Q factor를 분석 하였으며, Q factor가 100이상인 high Q inductor도 구현하였다. 이렇게 구현된 내장형 수동소자는 기판의 크기의 감소와 제조 단가의 절감, 최소 크기의 기판을 구현하는데 응용이 가능 할 것으로 예상 된다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.5 s.120
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• pp.539-546
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• 2007

In this paper, a 3-D EM simulation methodology for on-chip spiral inductor analysis has provided and it is shown that the methodology can be adapted to the highly predictable design for CMOS VCO. LC-resonator type VCO have fabricated by using standard 0.25 um CMOS process. And the LC VCO layout case which has pattern ground shielded inductors and the other layout case which has no pattern grounded inductors were fabricated for the verification of their effects on the VCO's phase noise by reducing the Q-factor of inductors. Fabricated VCO has 3.094 GHz, -12.15 dBm output at the tuning voltage of 2.5 V, and from the simulation, Q-factor of the pattern grounded inductor has increased 8% at 3 GHz, and from the measurement results, the phase noise has reduced by 9 dB at the 3 MHz off-set frequency for the pattern grounded inductor layout case.

• Journal of IKEEE
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• v.12 no.3
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• pp.138-143
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• 2008

In this study, we propose that the structures of spiral inductors have the environment advantage utilizing direct-write and LAM(Laser Ablation of Microparticles) processes without process step of lithography and etching etc. of existing semiconductor process. The structures of inductors have Si thickness of 540${\mu}m$, $SiO_2$ thickness of 3${\mu}m$. The width of Cu coils and the space between segments have 30${\mu}m$, respectively, using for direct-write and LAM processes. The performance of spiral planar inductors was simulated to frequency characteristics for inductance, quality-factor, SRF(Self- Resonance Frequency) using HFSS. The inductors without underpass and via have inductance of 1.11nH over the frequency range of 300 to 800 MHz, quality-factor of maximum 38 at 5 GHz, SRF of 18 GHz. Otherwise, inductors with underpass and via have inductance of 1.12nH over the frequency range of 300 to 800 MHz, quality-factor of maximum 35 at 5 GHz, SRF of 16 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.83-87
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• 2004

Phase noise performance and current consumption of Radio Frequency (RF) Voltage-Controlled Oscillator (VCO) are largely dependent on the Quality (Q) factor of inductor-capacitor (LC) tank. Because the Q-factor of LC tank is determined by on-chip spiral inductor, we designed, analyzed, and modeled on-chip differential inductor to enhance differential Q-factor, reduce current consumption and save silicon area. The simulated inductance is 3.3 nH and Q-factor is 15 at 2 GHz. Self-resonance frequency is as high as 13 GHz. To verify its use to RF applications, we designed 2 GHz differential LC VCO. The measurement result of phase noise is -112 dBc/Hz at an offset frequency of 100 kHz from a 2GHz carrier frequency. Tuning range is about 500 MHz (25%), and current consumption varies from 5mA to 8.4 mA using bias control technique. Implemented in $0.35-{\mu}m$ SiGe BiCMOS technology, the VCO occupies $400\;um{\times}800\;um$ of silicon area.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.2
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• pp.135-140
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• 2008

In this paper, the spiral antenna with the center frequencies of 315MHz, 433MHz, and 447MHz for RKE system of a vehicle is designed on PCB. The antenna is microstrip line-fed, and applied PIFA concept near the feeding part to easily tune center frequency and input impedance. The PIFA-type spiral antenna with the size of $30mm{\times}20mm$ is designed on printed PCB by considering the effect of circuits and components on PCB, ECU case and vehicle body. Also chip inductor inserted dual-band spiral antenna of 315MHz and 447MHz is designed. We found that the antenna designed on PCB satisfied the antenna specifications through measurement and field test.

• Proceedings of the KIEE Conference
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• 2008.10a
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• pp.107-108
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• 2008

This article describes optimization for PGS(Patterned Ground Shield) of rectangular spiral inductor using Taguchi's Design of Experiment. PGS is decrease method of parasite component by silicon substrate among dielectric loss reduction method. Using taguchi's design of experiment, each parameter is fixed upon that PGS high poison(A), slot spacing(B), strip width(C) and overlap turn number(D) of PGS design parameter. Then we verified that percentage contribution and design sensitivity analysis of each parameter and level by signal to noise ratio of larger-the-better type. We consider percentage contribution and design sensitivity of each parameter and level, and then verify that model of optimization for PGS is lower inductance decreasing ratio and higher Q-factor increasing ratio by EM simulation.

• Journal of the Korean Magnetics Society
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• v.11 no.6
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• pp.239-244
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• 2001

Recently, RF inductor having researched by many workers, we fabricated and investigated properties of RF inductors. In order to improve the Q-factor (Quality), we try to apply the patterned Fe$_{78.81}$Ta$_{8.47}$N$_{12.71}$ soft magnetic thin film of 5000 which shows magnetic anisotropy of 30 Oe. Thus, patterned magnetic film was artificially increased magnetic anisotropy lead to increasing of ferro-magnetic resonance frequency up to GHz band. Coil as part of inductor was fabricated by lift off process. The dimension of RF inductor was designed 47un, rectangular shape, and measured properties. In the case of Ti/Ag air core type inductor shows Q of 9, inductance of 8.4 nH at 2 GHz. Magnetic film employed inductor shows inductance of 9 nH and FMR resonance frequency was 700 MHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.12
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• pp.559-565
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• 2002

Today, because a quality factor of the inductor fabricated on silicon substrate for RFIC is under 12, the realization of inductor haying high-Q is essential. In this paper, two inductors having improved Q-factor are proposed and fabricated using a bondwire on silicon substrate. Also for the PGS is applied to the same inductors, four inductors are fabricated finally The bondwire Inductors have the relatively low conductor loss due to wide cross-section area and they can reduce the parastic capacitance very much because they are located in the air. Simulation and measurement results show that the proposed inductors have much more improved Q-factor, 15, than a conventional spiral inductor at 1.5 GHz. Because of the use of an automatic bonding machine, we can fabricate the high - Q inductors very easily, repeatedly.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.294-298
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• 2003

In this paper, the modeling and design of high-Q multilayer passives have been investigated, and multilayer diplexer for GSM/DCS applications has been designed and fabricated using the passives. To minimize the system, the configuration of a multilayer inductor has involved a square spiral structure. Modeling of a multilayer inductor was performed by the subsystems of distributed components, and using the modeling the optimal structures of the high-Q multilayer inductor could be designed by analyzing parasitics and couplings which affect their frequency characteristics. Multilayer diplexer for GSM/DCS application has been designed and fabricated using LTCC technology. LPF for GSM band had the passband insertion loss of less than 0.55 dB, the return loss of more than 12 dB, and the isolation level of more than 26 dB by locating attenuation pole at 1800 MHz. HPF for DCS band had the passband insertion loss of less than 0.82 dB, the return loss of more than 11 dB, and the isolation level of more than 38 dB by locating attenuation pole at 930 MHz.