• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.3
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• pp.141-145
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• 2018

Ni-InGaAs shows promise as a self-aligned S/D (source/drain) alloy for n-InGaAs MOSFETs (metal-oxide-semiconductor field-effect transistors). However, limited thermal stability and instability of the microstructural morphology of Ni-InGaAs could limit the device performance. The in situ deposition of a Pd interlayer beneath the Ni layer was proposed as a strategy to improve the thermal stability of Ni-InGaAs. The Ni-InGaAs alloy layer prepared with the Pd interlayer showed better surface roughness and thermal stability after furnace annealing at $570^{\circ}C$ for 30 min, while the Ni-InGaAs without the Pd interlayer showed degradation above $500^{\circ}C$. The Pd/Ni/TiN structure offers a promising route to thermally immune Ni-InGaAs with applications in future n-InGaAs MOSFET technologies.

• Herbal Formula Science
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• v.22 no.1
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• pp.33-45
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• 2014

Objectives : Zizyphi spinosi Semen is widely used for treating insomnia in korea and other oriental country. This study is analyzing combination tendency of Zizyphi spinosi Semen in herbal formula for treating insomnia. Methods : Herbal formulas for treating insomia were searched in "The Prescription Dictionary of Traditional Chinese Medicine", and checked in each literary source. Then, the herbal formula was divided in two groups : FCZ(The formula group containing Zizyphi spinosi Semen) and FWZ(The formula group without Zizyphi spinosi Semen). FCZ and FWZ were compared by following criteria; i) Prevalence of herbal formula by period ii) Prevalence of medicinal material's effects iii) Prevalence of medicinal material iv) Prevalence of the nature of midicinals v) Prevalence of flavor of medicinals vi) Prevalence of meridian entry. Results : 116 Herbal formula met our criteria, and herbal formulas were divided in two groups : FCZ(n=59), FWZ(n=57). The result of prevalence in FCZ is following; Herbal formula prevalence increased as time passed to the Qing(淸) dynasty. Tonifying and replenishing medicinal(補益藥), tranquillizing medicinal (安神藥), and inducing diuresis to drain dampness medicinal(利水滲濕藥) are the three most prevalent types of materia medica. In specifically, Panax ginseng radix(人蔘), Liriopis Tuber(麥門冬), Angelicae Gigantis Radix(當歸), Poria Cocos(茯神), Glycyrrhizae Radix(甘草), Poria cocos(茯神), Polygalae Radix(遠志), Thuja Orientalis L.(柏子仁), Paeonia Japonica(白芍藥), and HgS(硃砂) are combined frequently. The most prevalent nature of medicinals were 'warm microwarm(溫 微溫)' and flavor of medicinals was normal(平). Meridian entrys that frequently combined were heart(心), spleen(脾), and liver(肝). Conclusion : We found combination tendency of Zizyphi Semen in herbal formula for treating insomnia.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.379-379
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• 2013

본 논문에서는 Normal ink jetting 공법으로 OTFT를 제작할 때 coffee stain effect에 의해서 반도체 소자의 특성이 저하되는 것을 극복하기 위해서 동일한 위치에 동일한 부피로 Droplet을 형성하는 Multiple ink jetting 공법을 통해 TIPS pentacene 결정의 Morphology와 전기적 특성이 어떻게 변화하는지 알아 보았다. Multiple ink jetting의 drop 횟수가 증가할수록 coffee stain effect에 의해서 형성된 가운데 영역의 Dendrite grain이 점점 작아지다가 7 Drops 이후로는 Big grain 만 남게 되었다. Active layer의 표면 Roughness는 drop 횟수가 증가할수록 낮아지다가 일정 count 이후로는 다시 높아지는 것을 확인할 수 있었다. 전계 이동도(mobility)는 drop 횟수가 증가할수록 커지다가 일정 count 이후로는 saturation되는 것을 확인할 수 있었다. Multiple ink jetting에 의해서 만들어진 OTFT 소자의 전계 이동도(mobility)는 1 drop과 10 drops에서 각각 0.0059, 0.036 cm2/Vs 로 6배 정도 차이가 있었다. 이것은 첫 drop에 의해 만들어진 가운데 Dendrite grain 영역이 Multiple ink jetting을 반복하면서 점점 작아지게 되어 사라지고 두꺼운 Grain 영역만 남게 된 것으로 판단된다. Vth 와 On/Off ratio는 1 drop과 10 drops에서 각각 -3 V, -2 V 그리고 $3.3{\times}10^3$, $1.0{\times}10^4$를 보였다. OTFT의 substrate로 Flexible한 polyethersulfone (PES) 기판을 사용하였고, 절연체로 Spin coating된 Poly-4-vinylphenol (PVP)가 사용되었으며, Gate 및 Source/Drain 전극은 Au를 50 nm 두께로 증착하였다. Channel의 width와 length는 각각 100 um, 40 um 였고, Gate 전극 위에 Active layer를 형성한 Bottom gate 구조로 제작되었다. Ink jet으로 제작된 TIPS pentacene의 결정성은 x-ray diffraction (XRD)와 광학 현미경으로 분석하였고 Thickness profile은 알파스텝 측정기를 이용하였으며, OTFT의 전기적 특성은 Keithley-4,200을 사용하여 측정하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.221-221
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• 2013

Striving to replace the well known silicon nanocrystals embedded in oxides with solution-processable charge-trapping materials has been debated because of large scale and cost effective demands. Herein, a silicon quantum dot-polystyrene nanocomposite (SiQD-PS NC) was synthesized by postfunctionalization of hydrogen-terminated silicon quantum dots (H-SiQDs) with styrene using a thermally induced surface-initiated polymerization approach. The NC contains two miscible components: PS and SiQD@PS, which respectively are polystyrene and polystyrene chains-capped SiQDs. Spin-coated films of the nanocomposite on various substrate were thermally annealed at different temperatures and subsequently used to construct metal-insulator-semiconductor (MIS) devices and thin film field effect transistors (TFTs) having a structure p-$S^{++}$/$SiO_2$/NC/pentacene/Au source-drain. C-V curves obtained from the MIS devices exhibit a well-defined counterclockwise hysteresis with negative fat band shifts, which was stable over a wide range of curing temperature ($50{\sim}250^{\circ}C$. The positive charge trapping capability of the NC originates from the spherical potential well structure of the SiQD@PS component while the strong chemical bonding between SiQDs and polystyrene chains accounts for the thermal stability of the charge trapping property. The transfer curve of the transistor was controllably shifted to the negative direction by chaining applied gate voltage. Thereby, this newly synthesized and solution processable SiQD-PS nanocomposite is applicable as charge trapping materials for TFT based memory devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.438-439
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• 2013

Microelectronic devices의 접촉저항의 향상을 위해 Metal silicides의 형성 mechanism과 전기적 특성에 대한 연구가 많이 이루어지고 있다. 지난 수십년에 걸쳐, Ti silicide, Co silicide, Ni silicide 등에 대한 개발이 이루어져 왔으나, 계속적인 저저항 접촉 소재에 대한 요구에 의해 최근에는 Rare earth silicide에 관한 연구가 시작되고 있다. Rare-earth silicide는 저온에서 silicides를 형성하고, n-type Si과 낮은 schottky barrier contact (~0.3 eV)를 이룬다. 또한, 비교적 낮은 resistivity와 hexagonal AlB2 crystal structure에 의해 Si과 좋은 lattice match를 가져 Si wafer에서 high quality silicide thin film을 성장시킬 수 있다. Rare earth silicides 중에서 ytterbium silicide는 가장 낮은 electric work function을 갖고 있어 낮은 schottky barrier 응용에서 쓰이고 있다. 이로 인해, n-channel schottky barrier MOSFETs의 source/drain으로써 주목받고 있다. 특히 ytterbium과 molybdenum co-deposition을 하여 증착할 경우 thin film 형성에 있어 안정적인 morphology를 나타낸다. 또한, ytterbium silicide와 마찬가지로 낮은 면저항과 electric work function을 갖는다. 그러나 ytterbium silicide에 molybdenum을 화합물로써 높은 농도로 포함할 경우 높은 schottky barrier를 형성하고 epitaxial growth를 방해하여 silicide film의 quality 저하를 야기할 수 있다. 본 연구에서는 ytterbium과 molybdenum의 co-deposition에 따른 silicide 형성과 전기적 특성 변화에 대한 자세한 분석을 TEM, 4-probe point 등의 다양한 분석 도구를 이용하여 진행하였다. Ytterbium과 molybdenum을 co-deposition하기 위하여 기판으로 $1{\sim}0{\Omega}{\cdot}cm$의 비저항을 갖는 low doped n-type Si (100) bulk wafer를 사용하였다. Native oxide layer를 제거하기 위해 1%의 hydrofluoric (HF) acid solution에 wafer를 세정하였다. 그리고 고진공에서 RF sputtering 법을 이용하여 Ytterbium과 molybdenum을 동시에 증착하였다. RE metal의 경우 oxygen과 높은 반응성을 가지므로 oxidation을 막기 위해 그 위에 capping layer로 100 nm 두께의 TiN을 증착하였다. 증착 후, 진공 분위기에서 rapid thermal anneal(RTA)을 이용하여 $300{\sim}700^{\circ}C$에서 각각 1분간 열처리하여 ytterbium silicides를 형성하였다. 전기적 특성 평가를 위한 sheet resistance 측정은 4-point probe를 사용하였고, Mo doped ytterbium silicide와 Si interface의 atomic scale의 미세 구조를 통한 Mo doped ytterbium silicide의 형성 mechanism 분석을 위하여 trasmission electron microscopy (JEM-2100F)를 이용하였다.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.193-198
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• 2007

The NiSi is very promising candidate for the metallization in 60nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process window temperature for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5{\Omega}/{\square}$ and $3{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.1.1-1.1
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• 2011

Printed electronics based on the direct writing of solution processable functional materials have been of paramount interest and importance. In this talk, the synthesis of printable inorganic functional materials (conductors and semiconductors) for thin-film transistors (TFTs) and photovoltaic devices, device fabrication based on a printing technique, and specific characteristics of devices are presented. For printable conductor materials, Ag ink is designed to achieve the long-term dispersion stability and good adhesion property on a glass substrate, and Cu ink is sophisticatedly formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. In addition, the organic thin-film transistor based on the printed metal source/drain electrode exhibits the electrical performance comparable to that of a transistor based on a vacuum deposited Au electrode. For printable amorphous oxide semiconductors (AOSs), I introduce the noble ways to resolve the critical problems, a high processing temperature above $400^{\circ}C$ and low mobility of AOSs annealed at a low temperature below $400^{\circ}C$. The dependency of TFT performances on the chemical structure of AOSs is compared and contrasted to clarify which factor should be considered to realize the low temperature annealed, high performance AOSs. For photovoltaic application, CI(G)S nanoparticle ink for solution processable high performance solar cells is presented. By overcoming the critical drawbacks of conventional solution processed CI(G)S absorber layers, the device quality dense CI(G)S layer is obtained, affording 7.3% efficiency CI(G)S photovoltaic device.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.11
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• pp.2621-2626
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• 2013

This paper has presented the potential distribution for asymmetric double gate(DG) MOSFET, and sloved Poisson equation to obtain the analytical solution of potential distribution. The symmetric DGMOSFET where both the front and the back gates are tied together is three terminal device and has the same current controllability for front and back gates. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine current controllability for front and back gates. To approximate with experimental values, we have used the Gaussian function as doping distribution in Poisson equation. The potential distribution has been observed for gate bias voltage and gate oxide thickness and channel doping concentration of the asymmetric DGMOSFET. As a results, we know potential distribution is greatly changed for gate bias voltage and gate oxide thickness, especially for gate to increase gate oxide thickness. Also the potential distribution for source is changed greater than one of drain with increasing of channel doping concentration.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.789-794
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• 2017

Subthreshold current model is presented using analytical potential distribution of junctionless cylindrical surrounding-gate (CSG) MOSFET and threshold voltage shift is analyzed by this model. Junctionless CSG MOSFET is significantly outstanding for controllability of gate to carrier flow due to channel surrounded by gate. Poisson's equation is solved using parabolic potential distribution, and subthreshold current model is suggested by center potential distribution derived. Threshold voltage is defined as gate voltage corresponding to subthreshold current of $0.1{\mu}A$, and compared with result of two dimensional simulation. Since results between this model and 2D simulation are good agreement, threshold voltage shift is investigated for channel dimension and doping concentration of junctionless CSG MOSFET. As a result, threshold voltage shift increases for large channel radius and oxide thickness. It is resultingly shown that threshold voltage increases for the large difference of doping concentrations between source/drain and channel.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.1
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• pp.12-16
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• 2011

In this study, we fabricated the flexible pentacene TFTs with the polymer gate dielectric and contact printing method by using the silver nano particle ink as a source/drain material on plastic substrate. In this experiment, to lower the cross-linking temperature of the PVP gate dielectric, UV-Ozone treatment has been used and the process temperature is lowered to $90^{\circ}C$ and the surface is optimized by various treatment to improve device characteristics. We tried various surface treatments; $O_2$ Plasma, hexamethyl-disilazane (HMDS) and octadecyltrichlorosilane (OTS) treatment methods of gate dielectric/semiconductor interface, which reduces trap states such as -OH group and grain boundary in order to improve the OTFTs properties. The optimized OTFT shows the device performance with field effect mobility, on/off current ratio, and the sub-threshold slope were extracted as $0.63cm^2 V^{-1}s^{-1}$, $1.7{\times}10^{-6}$, and of 0.75 V/decade, respectively.