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Interface Treatment Effect of High Performance Flexible Organic Thin Film Transistor (OTFT) Using PVP Gate Dielectric in Low Temperature

저온 공정 PVP게이트 절연체를 이용한 고성능 플렉서블 유기박막 트랜지스터의 계면처리 효과

  • Yun, Ho-Jin (Department of Electronics Engineering, Chungnam National University) ;
  • Baek, Kyu-Ha (Electronics and Telecommunications Research Institute (ETRI)) ;
  • Shin, Hong-Sik (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Ga-Won (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Hi-Deok (Department of Electronics Engineering, Chungnam National University) ;
  • Do, Lee-Mi (Electronics and Telecommunications Research Institute (ETRI))
  • 윤호진 (충남대학교 전자전파정보통신공학과) ;
  • 백규하 (한국전자통신연구원 RFID/USN 소자팀) ;
  • 신홍식 (충남대학교 전자전파정보통신공학과) ;
  • 이가원 (충남대학교 전자전파정보통신공학과) ;
  • 이희덕 (충남대학교 전자전파정보통신공학과) ;
  • 도이미 (한국전자통신연구원 RFID/USN 소자팀)
  • Received : 2010.10.25
  • Accepted : 2010.12.12
  • Published : 2011.01.01

Abstract

In this study, we fabricated the flexible pentacene TFTs with the polymer gate dielectric and contact printing method by using the silver nano particle ink as a source/drain material on plastic substrate. In this experiment, to lower the cross-linking temperature of the PVP gate dielectric, UV-Ozone treatment has been used and the process temperature is lowered to $90^{\circ}C$ and the surface is optimized by various treatment to improve device characteristics. We tried various surface treatments; $O_2$ Plasma, hexamethyl-disilazane (HMDS) and octadecyltrichlorosilane (OTS) treatment methods of gate dielectric/semiconductor interface, which reduces trap states such as -OH group and grain boundary in order to improve the OTFTs properties. The optimized OTFT shows the device performance with field effect mobility, on/off current ratio, and the sub-threshold slope were extracted as $0.63cm^2 V^{-1}s^{-1}$, $1.7{\times}10^{-6}$, and of 0.75 V/decade, respectively.

Keywords

References

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