• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.2
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• pp.251-258
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• 1994

To apply the Power MOSFET to the high powerd circuits, the parallel operation of the Power MOSFET must be considered because of their low power rating. This means, in practical applications, design methods for the parallel operations are required. However, it is very difficult to investigate the problem of parallel operations by directly changing the internal parameters of the MOSFET. Thus, in this paper, the effects of internal parameters for the parallel operation are investigated using SPICE program which is often used and known that the program is very reliable. The investigation results show that while the gate resistance and gate capacitances are the parameters which affect to the dynamic switching operations, the drain and source resistances are the parameters which affect to the steady-state current unbalances. Through this investigation, the design methods for the parallel operation of the MOSFET are suggested, which, in turn, contributes to the practical use of Power MOSFETs.

• Proceedings of the KSR Conference
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• 2003.10b
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• pp.176-181
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• 2003

Damages by vibration and noise due to the construction performance are increasing. The rise of construction demand and enlargement of equipments are major reasons of this damage. As a result, the enmity of the people is provoked and this appears to be an obstacle of construction work. Especially, in case of ground improvement construction. Casing pipe is inserted into the Sand Drain, Sand Compaction Pile and Vibrated Crushed-stone Pile by vibration power when carrying out. Hence, a pillar is formed and it creates vibration and noise. This causes a lot of restrictions to construction condition. The low Vibration and low noise construction equipments uses earth auger and hydrulic cylinder for insertion and chopping operation instead of vibro hammer, which is the source of vibration and noise. This minimize ground disturbanceand decrease vibration and noise successfully, but increase chopping effect greatly. Thus, this new equipment is not only suitable for environment but also excellent engineering method of construction.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.238.2-238.2
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• 2011

Organic thin film transistors (OTFTs) have been attracting considerable attention because of their potential use in low-cost, large area, electronic devices such as flexible displays, biochemical sensors, and smart cards. In past several years, gold/pentacene has been frequently used in OTFTs because of the high mobility of pentacene and the high work function of gold. To improve the performance of the OTFTs contact area doping of pentacene with p-doping materials are well known. In this work we demonstrated selectively contact area doping of pentacene with Iodine vapor. For effective doping elevated pentacene layer under the source-drain area was deposited and exposed to Iodine vapor. We got better electrical performance for elevated pentacene structure rather than planer structure with relatively high field-effect mobility.

• ETRI Journal
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• v.31 no.3
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• pp.342-344
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• 2009

From a hydrodynamic device simulation for the pseudomorphic high electron mobility transistors (pHEMTs), we observe an increase of maximum extrinsic transconductance and a decrease of source-drain capacitances. This gives rise to an enhancement of the switching speed and isolation characteristics as the upper-to-lower planar-doping ratios (UTLPDR) increase. On the basis of simulation results, we fabricate single-pole-double-throw transmitter/receiver monolithic microwave integrated circuit (MMIC) switches with the pHEMTs of two different UTLPDRs (4:1 and 1:2). The MMIC switch with a 4:1 UTLPDR shows about 2.9 dB higher isolation and approximately 2.5 times faster switching speed than those with a 1:2 UTLPDR.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.127-133
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• 1996

In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photoresist reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate form both sides of the main gate. The poly-Si channel layer below the offset oxide is protected form the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of oru new device is the offset region due to the offset oxide. our experimental reuslts show that the offset region, due to the photoresist reflow process, has been sucessfully obtained in order to fabricate the offset gated poly-Si TFTs. The maximum ON/OFF ratio occurs at the L$_{off}$ of 1.1${\mu}$m and exceeds 1X10$^{6}$.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.629-632
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• 2008

Printed organic thin-film transistors (OTFTs) were used in the fabrication of a screen- printed gate, source and drain electrodes on flexible plastic substrates using silver pastes, a coated polyvinylphenol dielectrics, and jetted bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) organic semiconductor. The OTFTs printed using screen printing and soluble processes made it was possible to fabricate a printed OTFT with a channel length as small as $13\;{\mu}m$ on plastic substrates; this was not possible using previous traditional printing techniques.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.654-656
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• 2008

We enhanced the conductivity of PEDOT-PSS by mixing with glycerol and fabricated the low contact resistance of source and drain[S/D] electrodes of OTFT with PEDOT-PSS by ink-jetting printing. The contact resistance was much smaller by seven times than Au with $200k{\Omega}$ at $V_G=-5V$. For the bottom contacted OTFTs, the performance was comparable to OTFTs with Au electrodes with the field effect mobility of $0.2\;cm^2/V s$.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.747-751
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• 2006

The hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) with copper as source and drain electrode has been fabricated to obtain its transfer characteristics and stressed with positive and negative bias to investigate the instability variation comparing to conventional MoW-Al based TFT device. The results show that there is no copper diffusion into active layer of a-Si:H TFT, even during the thermal process. In addition, a 15-inch XGA a Si:H TFT LCD display utilizing Cu as gate electrodes has been developed.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.74-77
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• 2006

Thin $AuO_x$ layer was formed by $O_2$ plasma treatment on Au electrode. The surface work function of plasma treatment showed higher by 0.5 eV than that of bare Au, reducing the hole injection barrier at the Au/pentacene interface. Using $O_2$ plasma-treated Au source-drain electrodes, the field-effect mobility of bottom-contact pentacene-OTFT was increased from 0.05 to 0.1 $cm^2/Vs$.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1135-1138
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• 2006

By ink-jet printing method, organic thin-film transistors (OTFTs) having soluble 6,13-bis (triisopropylsilylethynyl) pentacene (TIPS pentacene) as an active material were fabricated. The TIPS pentacene solution was made with chlorobenzene and anisole. The solutions were printed on poly (4-vinylphenol) (PVP) dielectric layers and source/drain electrodes by piezo-type heads for bottom contact OTFTs. The dielectric layers had untreated or HMDS-treated conditions. The chlorobenzene device showed the highest field effect mobility of $0.016\;cm^2/Vs$ and the anisole HMDS-treated device shows the highest $I_{on}/I_{off}$ ratio of $10^5$.