• Title/Summary/Keyword: single loop control

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Control Strategy of Resonant DC Link Inverter for UPS (UPS용 병렬공진형 직류링크인버터를 위한 제어방식에 관한 연구)

  • Beak, J.W.;Yoo, D.W.;Min, B.G.;Ryu, S.P.
    • Proceedings of the KIEE Conference
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    • 1994.11a
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    • pp.159-161
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    • 1994
  • A new control technique which generates high-quality sinusoidal output voltage from a single-phase resonant do link inverter suitable for the UPS systems is presented. The inverter output voltage control system has the PID controller with a minor loop of the filter inductor current and tile feedforward controller. The proposed control scheme also solves resonant voltage overshoot without any additional switch or passive component, resulting in pulses with uniform amplitude and high efficiency. Experimental results in the case of linear and nonlinear loads are presented to confirm the usefulness of the Proposed control algorithms.

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Distributed Control of the Arago's Disc System with Gain Scheduler

  • Ibrahim, Lateef Onaadepo;Choi, Goon-Ho
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.3
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    • pp.25-30
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    • 2017
  • Arago's disk system consists of a speed controller of the DC motor (inner loop controller) and a position controller of the magnetic bar angle (main controller), which are implemented by the design of the PI and PID controller, respectively. First, we analyzed the nonlinear characteristics of the Arago disk system and found the operating point range of three locations as a result. In this paper, a gain scheduler method was applied to guarantee a constant control performance in the range of $0{\sim}130^{\circ}C$, and a structure to change the controller according to the control reference value based on the previously obtained operating points was experimentally implemented. The Distributed Control Systems (DCS) configuration using the Controller Area Network (CAN) was used to verify the proposed method by improving the operational efficiency of the entire experimental system. So, simplicity of the circuit and easy diagnosis were achieved through a single CAN bus communication.

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Design of a 99dB DR single-bit 4th-order High Performance Delta-Sigma Modulator (99dB의 DR를 갖는 단일-비트 4차 고성능 델타-시그마 모듈레이터 설계)

  • Choi, Young-Kil;Roh, Hyung-Dong;Byun, San-Ho;Nam, Hyun-Seok;Roh, Jeong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.2
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    • pp.25-33
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    • 2007
  • In this paper, a fourth-order single-bit delta-sigma modulator is presented and implemented. The loop-filter is composed of both feedback and feedforward paths. Measurement results show that maximum 99dB dynamic range is achievable at a clock rate of 3.2MHz for 20kHz baseband. The proposed modulator has been fabricated in a $0.18{\mu}m$ standard CMOS process.

Design of Parallel-Operated SEPIC Converters Using Coupled Inductor for Load-Sharing

  • Subramanian, Venkatanarayanan;Manimaran, Saravanan
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.327-337
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    • 2015
  • This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

A study on the digital carrier recovery loop with adaptive loop bandwidth (적응 루프 대역폭을 가진 디지털 반송파 동기 루프에 관한 연구)

  • 한동석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.8
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    • pp.1774-1781
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    • 1997
  • In this paper, we propose a full digital frequency and phase locked loop for CATV and HDTV receivers adopting VSB modulation. The CATV and HDTV receivers proposed by the Grand-Alliance in USA are ultilizing analog signal processing technology for carrier recovery. By the way, it is not a good architecture for the development of single chip ASIC operating in digital domain. To solve this problem while improving the performance, we first down convert the received r.f. signal to a near baseband signal for a low-rate AD converter and then we use digital signal processing techniques. The proposed system has the frequency pull-in range of -200 KHz +2.50 KHz. Moreover, it has the ability of adaptive loop bandwidth control according to the amount of frequency offset to improve the acquisition time while reducing the phase noise.

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Offset Frequency Stabilization of He-Ne Lasers Using Phase Locked Loop (PLL을 이용한 헬륨-네온 레이저의 옵셋 주파수 안정화)

  • Yun Dong Hyun;Suh Ho Sung;Lyou Joon
    • Journal of Institute of Control, Robotics and Systems
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    • v.11 no.6
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    • pp.496-501
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    • 2005
  • This paper presents experimental results of the frequency offset locking of He-Ne lasers and the stability analysis. The master laser is free running, and the slave laser is a single-mode operating laser. The frequency difference of two lasers is stabilized to 200 MHz which can be synchronized using PLL servo. The measured beat frequency between two lasers was 200.004 MHz ${\pm}$ 0.15 MHz. The square root of Allan variance as a measure of stability in time domain is also measured. The long-term stability of the beat was worse than sort-term stability. With a gate time $\tau=1000\;s$, the square root of Allan variance was about 1 GHz. The results of the square root of Allan variance of the stabilized beat signal was a gate time of $\tau=1000\;s$, the square root of Allan variance was about 1.5 kHz. The long-term stability was improved by more than several hundred times compared with that without the stabilization.

Ship nonlinear-feedback course keeping algorithm based on MMG model driven by bipolar sigmoid function for berthing

  • Zhang, Qiang;Zhang, Xian-ku;Im, Nam-kyun
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.9 no.5
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    • pp.525-536
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    • 2017
  • Course keeping is hard to implement under the condition of the propeller stopping or reversing at slow speed for berthing due to the ship's dynamic motion becoming highly nonlinear. To solve this problem, a practical Maneuvering Modeling Group (MMG) ship mathematic model with propeller reversing transverse forces and low speed correction is first discussed to be applied for the right-handed single-screw ship. Secondly, a novel PID-based nonlinear feedback algorithm driven by bipolar sigmoid function is proposed. The PID parameters are determined by a closed-loop gain shaping algorithm directly, while the closed-loop gain shaping theory was employed for effects analysis of this algorithm. Finally, simulation experiments were carried out on an LPG ship. It is shown that the energy consumption and the smoothness performance of the nonlinear feedback control are reduced by 4.2% and 14.6% with satisfactory control effects; the proposed algorithm has the advantages of robustness, energy saving and safety in berthing practice.

Single Antenna Radar Sensor with FMCW Radar Transceiver IC (FMCW 송수신 칩을 이용한 단일 안테나 레이다 센서)

  • Yoo, Kyung Ha;Yoo, Jun Young;Park, Myung Chul;Eo, Yun Seong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.8
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    • pp.632-639
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    • 2018
  • This paper presents a single antenna radar sensor with a Ku-band radar transceiver IC realized by 130 nm CMOS processes. In this radar receiver, sensitivity time control using a DC offset cancellation feedback loop is employed to achieve a constant SNR, irrespective of distance. In addition, the receiver RF block has gain control to adjust high dynamic range. The RF output power is 9 dBm and the full chain gain of the Rx is 82 dB. To reduce the direct-coupled Tx signal to the Rx in a single antenna radar, a stub-tuned hybrid coupler is adopted instead of a bulky circulator. The maximum measured distance between the horn antenna and a metal plate target is 6 m.

Reliable $H_{\infty}$ Controller Design for a Class of Uncertain Linear Systems with Actuator Failures

  • Dai, Shi-Lu;Zhao, Jun
    • International Journal of Control, Automation, and Systems
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    • v.6 no.6
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    • pp.954-959
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    • 2008
  • This paper is concerned with the reliable $H_{\infty}$ controller design problem for uncertain linear systems against actuator failures. In the design, the $H_{\infty}$ performance of the closed-loop system is optimized during normal operation(without failures) while the system satisfies a prescribed $H_{\infty}$ performance level in the case of actuator failures. Single and parameter-dependent Lyapunov function approaches are applied in designing suboptimal reliable $H_{\infty}$ controllers. Simulation studies are presented to demonstrate the effectiveness of the proposed design procedures.

Controller Design of a MEMS Gyro-Accelerometer with a Single Proof Mass

  • Sung, Woon-Tahk;Kang, Tae-Sam;Lee, Jang-Gyu
    • International Journal of Control, Automation, and Systems
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    • v.6 no.6
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    • pp.873-883
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    • 2008
  • This paper presents a parametric study on the controller design scheme for a gyro-accelerometer to have robust performance under some parameter variations. In particular, an integral and derivative based controller design method is suggested to achieve the desired performances of stability margin, bandwidth, and uniformity of scale for both gyroscopes and accelerometers with uncertainties of quality factor and resonant frequency. The simulation result shows that the control loop based on the suggested method gives satisfactory performance robustness under parameter variations, demonstrating the usefulness of the proposed design scheme.