• 진공이야기
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• 제3권3호
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• pp.15-18
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• 2016

In future wearable electronic systems, 3-dimensional (3D) devices have attracted much attention due to their high density integration and low-power functionality. Among 3D devices, gate-all-around (GAA) nanowire transistor provides superior gate controllability, resulting in suppressing short channel effect and other drawbacks in 2D metal-oxide-semiconductor field-effect transistor (MOSFET). Silicon nanowires (SiNWs) are the most promising building block for GAA structure device due to their compatibility with the current Si-based ultra large scale integration (ULSI) technology. Moreover, the theoretical limit for subthreshold swing (SS) of MOSFET is 60 mV/dec at room temperature, which causes the increase in Ioff current. To overcome theoretical limit for the SS, it is crucial that research into new types of device concepts should be performed. In our present studies, we have experimentally demonstrated feedback FET (FBFET) and tunnel FET (TFET) with sub-60 mV/dec based on SiNWs. Also, we fabricated SiNW based complementary TFET (c-TFET) and SiNW complementary metal-oxide-semiconductor (CMOS) inverter. Our research demonstrates the promising potential of SiNW electronic devices for future wearable electronic systems.

• 한국정보통신학회논문지
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• 제20권9호
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• pp.1771-1777
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• 2016

본 논문에서는 나노와이어 N-채널 GAA MOSFET의 항복전압 특성을 측정과 3 차원 소자 시뮬레이션을 통하여 분석하였다. 측정에 사용된 나노와이어 GAA MOSFET는 게이트 길이가 250nm이며 게이트 절연층 두께는 6nm이며 채널 폭은 400nm부터 3.2um이다. 측정 결과로부터 나노와이어 GAA MOSFET의 항복전압은 게이트 전압에 따라 감소하다가 높은 게이트 전압에서는 증가하였다. 나노와이어의 채널 폭이 증가할수록 항복전압이 감소한 것은 floating body 현상으로 채널의 포텐셜이 증가하여 기생 바이폴라 트랜지스터의 전류 이득이 증가한 것으로 사료된다. 게이트 스트레스로 게이트 절연층에 양의 전하가 포획되면 채널 포텐셜이 증가하여 항복전압이 감소하고 음의 전하가 포획되면 포텐셜이 감소하여 항복전압이 증가하는 것을 알 수 있었다. 항복전압의 측정결과는 소자 시뮬레이션의 포텐셜 분포와 일치하는 것을 알 수 있었다.

• 한국결정성장학회지
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• 제16권6호
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• pp.256-259
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• 2006

Vapor phase epitaxy(VPE)법을 사용하여 amorphous $SiO_x$. nanowires를 성장시켰다. Ni thin film을 촉매로 사용하여 Si 기판위에 $800{\sim}1100^{\circ}C$ 범위의 온도에서 성장시켰으며, $SiO_x$ nanowires의 성장 메커니즘은 Vapor-liquid-solid(VLS)으로 확인되었다. $SiO_x$ nanowires의 shape와 morphology는 scanning electron microscope(SEM)으로 분석하였으며, cotton-like형태이고 길이는 $10{\mu}m$정도였다. 그리고 구조적 특징은 transmission electron microscope(TEM)으로 관찰하였고, $SiO_x$ nanowires의 성분 분석은 energy dispersed X-ray spectroscopy(EDS)로 하였다. EDX spectrum으로 nanowires가 Si와 O로 구성되어졌음을 확인하였다.

• Bulletin of the Korean Chemical Society
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• 제32권12호
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• pp.4371-4376
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• 2011

In this work, we investigate the growth behavior of silicon oxide nanowires via a solid-liquid-solid process. Silicon oxide nanowires were synthesized at $1000^{\circ}C$ in an Ar and $H_2$ mixed gas. A pre-oxidized silicon wafer and a nickel film are used as the substrate and catalyst, respectively. We propose two distinctive growth modes for the silicon oxide nanowires that both act as a unique solid-liquid-solid growth process. We named the two growth mechanisms "grounded-growth" and "branched-growth" modes to characterize their unique solid-liquid-solid growth behavior. The two growth modes were classified by the generation site of the nanowires. The grounded-growth mode in which the grown nanowires are generated from the substrate and the branchedgrowth mode where the nanowires are grown from the side of the previously grown nanowires or at the metal catalyst drop attached at the tip of the nanowire stem.

• 한국세라믹학회지
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• 제45권3호
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• pp.142-145
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• 2008

The growth of amorphous silica nanowires by on-site feeding of silicon and oxygen is reported. The nanowires were grown on a nickel-coated oxidized silicon substrate without external silicon or oxygen sources. Transmission electron microscopy observation revealed that the nanowires, which have diameters of less than 50 nm and a length of several micrometers, were grown using a traditional vapor-liquid-solid mechanism. Blue photoluminescence was observed from these nanowires at room temperature. An approach to grow nanowires without external precursors may be useful when integrating nanowires into devices structures. This can benefit the fabrication of nanowire-based nanodevices.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권3호
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• pp.182-189
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• 2011

In this work, a tunneling field-effect transistor (TFET) based on heterojunctions of compound and Group IV semiconductors is introduced and simulated. TFETs based on either silicon or compound semiconductors have been intensively researched due to their merits of robustness against short channel effects (SCEs) and excellent subthreshold swing (SS) characteristics. However, silicon TFETs have the drawback of low on-current and compound ones are difficult to integrate with silicon CMOS circuits. In order to combine the high tunneling efficiency of narrow bandgap material TFETs and the high mobility of III-V TFETs, a Type-I heterojunction tunneling field-effect transistor (I-HTFET) adopting $Ge-Al_xGa_{1-x}As-Ge$ system has been optimized by simulation in terms of aluminum (Al) composition. To maximize device performance, we considered a nanowire structure, and it was shown that high performance (HP) logic technology can be achieved by the proposed device. The optimum Al composition turned out to be around 20% (x=0.2).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.259-259
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• 2010

교류 전기장에 의해 배열된 ZnO 나노선 기반의 광다이오드를 제작하고 자외선 광특성을 조사하였다. ZnO 나노선은 dielectrophoresis (DEP) force와 토크 (T)에 의하여 두 전극사이에 배열되며, silicon (Si)나노선과 접합을 하여 p-n 접합을 형성한다. 형성된 p-n 접합은 정류작용을 하는 다이오드 특성을 보이며, 자외선 입사시 전류 점멸비 (on/off ratio) $10^1{\sim}10^2$을 보이는 광다이오드(photodiode)로서 동작한다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2009년도 춘계학술발표대회
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• pp.52.1-52.1
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• 2009

Cupric oxide (CuO) is a p-type semiconductor with band gap of ~1.7 eV and reported to be suitable for catalysis, lithium-copper oxide electrochemical cells, and gas sensors applications. The nanoparticles, plates and nanowires of CuO were found sensing to NO2, H2S and CO. In this work, we report about the comparison about hydrogen sensing of nano thin film and nanowires structured CuO deposited on single-walled carbon nanotubes (SWNTs). The thin film and nanowires are synthesized by deposition of Cu on different substrate followed by oxidation process. Nano thin films of CuO are deposited on thermally oxidized silicon substrate, whereas nanowires are synthesized by using a porous thin film of SWNTs as substrate. The hydrogen sensing properties of synthesized materials are investigated. The results showed that nanowires cupric oxide deposited on SWNTs showed higher sensitivity to hydrogen than those of nano thin film CuO did.

• EDISON SW 활용 경진대회 논문집
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• 제5회(2016년)
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• pp.295-298
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• 2016

Future logic device over the FinFET generation requires a complete electrostatics and transport characteristic for low-power and high-speed operation as extremely scaled devices. Silicon, Germanium and III-V based nanowire-based MOSFET devices and few-layer TMDC (Transition metal dichalcogenide monolayers) based multi-gate devices have been brought attention from device engineers due to those excellent electrostatic and novel device characteristic. In this study, we simulated ultrascaled Si/Ge/InAs gate-all-around nanowire MOSFET and MoS2 TMDC based DG MOSFET and TFET device by tight-binding NEGF method. As a result, we can find promising candidates of the future logic device of each channel material and device structures.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 제38회 하계학술대회
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• pp.1548-1549
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• 2007

이 실험은 간단한 가열로(heating furnace)를 이용 thermal CVD(chemical Chemical Depositin) 방법을 사용하여, 촉매를 사용하지 않고 실리콘 나노와이어(Si nanowire)를 합성하는 방법에 대해서 연구한 것이다. 굴곡도(roughness)가 큰 알루미나(($Al_{2}O_{3}$) 기판을 사용하여 금(Au)과 같은 촉매를 사용하지 않고 실리콘 나노와이어를 성장시켜 대략 20nm 전후의 지름을 가진 실리콘 나노와이어를 성장시킬 수 있었다. 이 방법은 금을 촉매로 이용하는 방법에 비하여 기판위에 증착되어 성장된 실리콘 나노와이어가 직전성을 가지지 못하고 꼬여있어서 나노와 이어의 분산 과저에서 어려움이 존재하지만 촉매를 사용하지 않기 때문에 성장된 나노와이어에서 촉매를 제거해야하는 어려움을 생략할 수 있고, 기판 위에 촉매를 seeding 하는 작업을 거치지 않고도 20nm 정도의 실리콘 나노와이어를 성장시킬 수 있는 간단한 방법이다.