• 제목/요약/키워드: silicon electrode

검색결과 396건 처리시간 0.025초

흡착벗김 전압전류법을 이용한 게르마늄 분석에 관한 연구 (The study of Germanium analysis by Adsorption Stripping Voltammetry)

  • 윤영자;정다위;남궁미옥
    • 분석과학
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    • 제8권2호
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    • pp.171-179
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    • 1995
  • 흡착벗김전압전류법을 이용하여 게르마늄 분석을 하였으며, 리간드로는 Tannic acid를 사용하였다. 수집전위는 -0.2V, 수집시간은 60초, 평형시간은 20초, 주파수는 10Hz였다. 작업전극으로는 매달린 수은전극을 이용하였고 지지전해질로는 pH=4.5인 아세트산 완충용액을 사용하였다. 게르마늄의 분석을 위한 리간드의 알맞은 조건을 알아내었고 게르마늄 봉우리 전류에 대한 금속이온(납, 구리, 규소, 주석, 갈륨)의 영향에 대하여 조사하였다.

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SPM을 이용한 반도체 포토레지스트 제거 공정 대체를 위한 DIW-$O_3$ 방식 세정기술 개발 (Development of the DIW-$O_3$ Cleaning Technology Substituted for the Semiconductor Photoresist Strip Process using the SPM)

  • 손영수;함상용
    • 연구논문집
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    • 통권33호
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    • pp.99-109
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    • 2003
  • Recently the utilization of the ozone dissolved de-ionized water(DIW-$O_3$) in semiconductor wet cleaning process and photoresist stripping process to replace the conventional sulfuric acid and hydro peroxide mixture(SPM) method has been studied. In this paper, we propose the water-electrode type ozone generator which has the characteristics of the high concentration and purity to produce the high concentration DIW-$O_3$ for the photoresist strip process in the semiconductor fabrication. The proposed ozone generator has the dual dielectric tube structure of silent discharge type and the water is both used to electrode and cooling water. Through this study, we obtained the results of the 10.3 wt% of ozone gas concentration at the oxygen gas of 0.5 [liter/min.] and the DIW-$O_3$ concentration of 79.5 ppm.. Through the photoresist stripping test using the produced DIW-$O_3$, we confirmed that the photoresist coated on the silicon wafer was removed effectively in the 12 minutes.

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표면결함식각 및 반사방지막 열처리에 따른 태양전지의 효율 개선 (Silicon Solar Cell Efficiency Improvement with surface Damage Removal Etching and Anti-reflection Coating Process)

  • 조찬섭;오정화;이병렬;김봉환
    • 반도체디스플레이기술학회지
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    • 제13권2호
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    • pp.29-35
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    • 2014
  • In this study general solar cell production process was complemented, with research on improvement of solar cell efficiency through surface structure and thermal annealing process. Firstly, to form the pyramid structure, the saw damage removal (SDR) processed surface was undergone texturing process with reactive ion etching (RIE). Then, for the formation of smooth pyramid structure to facilitate uniform doping and electrode formation, the surface was etched with HND(HF : HNO3 : D.I. water=5 : 100 : 100) solution. Notably, due to uniform doping the leakage current decreased greatly. Also, for the enhancement and maintenance of minority carrier lifetime, antireflection coating thermal annealing was done. To maintain this increased lifetime, front electrode was formed through Au plating process without high temperature firing process. Through these changes in two processes, the leakage current effect could be decreased and furthermore, the conversion efficiency could be increased. Therefore, compared to the general solar cell with a conversion efficiency of 15.89%, production of high efficiency solar cell with a conversion efficiency of 17.24% was made possible.

Design of Parasitic Inductance Reduction in GaN Cascode FET for High-Efficiency Operation

  • Chang, Woojin;Park, Young-Rak;Mun, Jae Kyoung;Ko, Sang Choon
    • ETRI Journal
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    • 제38권1호
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    • pp.133-140
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    • 2016
  • This paper presents a method of parasitic inductance reduction for high-speed switching and high-efficiency operation of a cascode structure with a low-voltage enhancement-mode silicon (Si) metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-voltage depletion-mode gallium nitride (GaN) fielde-ffect transistor (FET). The method is proposed to add a bonding wire interconnected between the source electrode of the Si MOSFET and the gate electrode of the GaN FET in a conventional cascode structure package to reduce the most critical inductance, which provides the major switching loss for a high switching speed and high efficiency. From the measured results of the proposed and conventional GaN cascode FETs, the rising and falling times of the proposed GaN cascode FET were up to 3.4% and 8.0% faster than those of the conventional GaN cascode FET, respectively, under measurement conditions of 30 V and 5 A. During the rising and falling times, the energy losses of the proposed GaN cascode FET were up to 0.3% and 6.7% lower than those of the conventional GaN cascode FET, respectively.

고효율 적층형 태양전지를 위한 유무기 페로브스카이트 (Organic-Inorganic Perovskite for Highly Efficient Tandem Solar Cells)

  • 박익재;김동회
    • 세라미스트
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    • 제22권2호
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    • pp.146-169
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    • 2019
  • To overcome the theoretical efficiency of single-junction solar cells (> 30 %), tandem solar cells (or multi-junction solar cells) is considered as a strong nominee because of their excellent light utilization. Organic-inorganic halide perovskite has been regarded as a promising candidate material for next-generation tandem solar cell due to not only their excellent optoelectronic properties but also their bandgap-tune-ability and low-temperature process-possibility. As a result, they have been adopted either as a wide-bandgap top cell combined with narrow-bandgap silicon or CuInxGa(1-x)Se2 bottom cells or for all-perovskite tandem solar cells using narrow- and wide-bandgap perovskites. To successfully transition perovskite materials from for single junction to tandem, substantial efforts need to focus on fabricating the high quality wide- and narrow-bandgap perovskite materials and semi-transparent electrode/recombination layer. In this paper, we present an overview of the current research and our outlook regarding perovskite-based tandem solar technology. Several key challenges discussed are: 1) a wide-bandgap perovskite for top-cell in multi-junction tandem solar cells; 2) a narrow-bandgap perovskite for bottom-cell in all-perovskite tandem solar cells, and 3) suitable semi-transparent conducting layer for efficient electrode or recombination layer in tandem solar cells.

수소화된 비정질규소 박막트랜지스터의 누설전류 (Leakage Current of Hydrogenated Amorphous Silicon Thin-Film Transistors)

  • 이호년
    • 한국산학기술학회논문지
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    • 제8권4호
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    • pp.738-742
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    • 2007
  • 능동형 평판디스플레이 소자를 제작하기 위해 수소화된 비정질 규소 박막트랜지스터 (a-Si:H TFT)의 상부에 화소전극을 형성하는 과정에 따른 TFT의 특성 변화를 연구하였다. 화소전극 형성 전에 1 pA 수준의 오프상태 전류 및 $10^6$ 이상의 스위칭률을 보이던 TFT에 화소전극 공정을 행하면 오프상태 전류가 10 pA 이상으로 증가하여 소자특성이 악화되었다. 이러한 소자특성의 악화는 SiNx 보호막 표면의 플라즈마 처리로 개선될 수 있었는데, 특히 $N_2$ 플라즈마가 좋은 결과를 보였다. 화소전극 공정에 의해서 누설전류가 증가하는 것은 투명전도막 증착공정 중에 SiNx 보호막 표면에 전하가 축적되어 이에 유도되는 백채널의 캐리어 축적에 기인하는 것으로 추정된다.

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NMOS 게이트 전극에 사용될 Ta-Ti 합금의 특성 (Characteristics of Ta-Ti alloy Metal for NMOS Gate Electrodes)

  • 강영섭;이충근;김재영;홍신남
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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    • pp.15-18
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    • 2003
  • Ta-Ti metal alloy is proposed for alternate gate electrode of ULSI MOS device. Ta-Ti alloy was deposited directly on $SiO_2$ by a co-sputtering method and good interface property was obtained. The sputtering power of each metal target was 100W. Thermal and chemical stability of the electrode was studied by annealing at $500^{\circ}C$ and $600^{\circ}C$ in Ar ambient. X-ray diffraction was measured to study interface reaction and EDX(energy dispersive X-ray) measurement was performed to investigate composition of Ta and Ti element. Electrical properties were evaluated on MOS capacitor, which indicated that the work function of Ta-Ti metal alloy was ${\sim}4.1eV$ compatible with NMOS devices. The measured sheet resistance of alloy was lower than that of poly silicon.

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단일 a-InGaZnO 박막 트랜지스터를 이용한 정전용량 터치 화소 센서 회로 (Capacitive Touch Sensor Pixel Circuit with Single a-InGaZnO Thin Film Transistor)

  • 강인혜;황상호;백영조;문승재;배병성
    • 센서학회지
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    • 제28권2호
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    • pp.133-138
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    • 2019
  • The a-InGaZnO (a-IGZO) thin film transistor (TFT) has the advantages of larger mobility than that of amorphous silicon TFTs, acceptable reliability and uniformity over a large area, and low process cost. A capacitive-type touch sensor was studied with an a-IGZO TFT that can be used on the front side of a display due to its transparency. A capacitive sensor detects changes of capacitance between the surface of the finger and the sensor electrode. The capacitance varies according to the distance between the sensor plate and the touching or non-touching of the sensing electrode. A capacitive touch sensor using only one a-IGZO TFT was developed with the reduction of two bus lines, which made it easy to reduce the pixel pitch. The proposed sensor circuit maintained the amplification performance, which was investigated for various drive conditions.

탄소가 코팅된 일산화규소(SiO) 음극에서 전해질 첨가제로서 Lithium Bis(oxalato)borate의 영향 (Effect of Lithium Bis(oxalate)borate as an Electrolyte Additive on Carbon-coated SiO Negative Electrode)

  • 김건우;이재길;박호상;김종정;류지헌;김영욱;오승모
    • 전기화학회지
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    • 제17권1호
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    • pp.49-56
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    • 2014
  • 탄소가 코팅된 일산화규소(C-coated SiO) 전극에서 전해질 첨가제로서 lithium bis(oxalato)borate(LiBOB)의 영향을 조사하였다. 전해질 조성은 1.3M $LiPF_6$/ethylene carbonate (EC), fluoroethylene carbonate (FEC), diethyl carbonate (DEC) (5:25:70 v/v/v)이며, 여기에 LiBOB을 0.5 wt.% 첨가한 것과 첨가하지 않은 2가지 전해질을 사용하였다. LiBOB을 첨가하지 않은 전해질에서 C-coated SiO 전극은 초기에 저항이 작은 피막이 형성되어 결정질의 $Li_{15}Si_4$를 형성할 때까지 합금화가 진행되며 동시에 큰 부피 변화를 보였다. 따라서 입자의 균열이 발생하고, 전극의 저항이 증가하여 충방전이 진행됨에 따라 용량이 빠르게 감소하였다. 반면에 LiBOB이 첨가된 전해질에서는 초기에 LiBOB의 환원분해에 의해 저항이 큰 피막이 형성되어, 합금화 반응이 원활히 진행되지 못하였다. 따라서 결정질 $Li_{15}Si_4$도 생성되지 못하였고, 결과적으로 부피변화도 적게 발생하므로 입자의 균열과 전극 저항의 증가도 적게 나타났다. 이러한 효과로 싸이클 후반부에서 용량감소가 적었고, 싸이클 성능도 좋은 결과를 보였다. 반면 피막 저항에 의한 영향이 줄어드는 $45^{\circ}C$ 에서는 LiBOB 첨가에 관계없이 합금화 반응이 유사하게 진행되며 비슷한 싸이클 성능을 나타내었다.

Metal Oxide Thin Film Transistor with Porous Silver Nanowire Top Gate Electrode for Label-Free Bio-Relevant Molecules Detection

  • 유태희;김정혁;상병인;최원국;황도경
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.268-268
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    • 2016
  • Chemical sensors have attracted much attention due to their various applications such as agriculture product, cosmetic and pharmaceutical components and clinical control. A conventional chemical and biological sensor is consists of fluorescent dye, optical light sources, and photodetector to quantify the extent of concentration. Such complicated system leads to rising cost and slow response time. Until now, the most contemporary thin film transistors (TFTs) are used in the field of flat panel display technology for switching device. Some papers have reported that an interesting alternative to flat panel display technology is chemical sensor technology. Recent advances in chemical detection study for using TFTs, benefits from overwhelming progress made in organic thin film transistors (OTFTs) electronic, have been studied alternative to current optical detection system. However numerous problems still remain especially the long-term stability and lack of reliability. On the other hand, the utilization of metal oxide transistor technology in chemical sensors is substantially promising owing to many advantages such as outstanding electrical performance, flexible device, and transparency. The top-gate structure transistor indicated long-term atmosphere stability and reliability because insulator layer is deposited on the top of semiconductor layer, as an effective mechanical and chemical protection. We report on the fabrication of InGaZnO TFTs with silver nanowire as the top gate electrode for the aim of chemical materials detection by monitoring change of electrical properties. We demonstrated that the improved sensitivity characteristics are related to the employment of a unique combination of nano materials. The silver nanowire top-gate InGaZnO TFTs used in this study features the following advantages: i) high sensitivity, ii) long-term stability in atmosphere and buffer solution iii) no necessary additional electrode and iv) simple fabrication process by spray.

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