• 제목/요약/키워드: silicon defects

검색결과 247건 처리시간 0.035초

Improvement in the bias stability of zinc oxide thin-film transistors using an $O_2$ plasma-treated silicon nitride insulator

  • 김웅선;문연건;권태석;박종완
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.180-180
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    • 2010
  • Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

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Effective Silicon Oxide Formation on Silica-on-Silicon Platforms for Optical Hybrid Integration

  • Kim, Tae-Hong;Sung, Hee-Kyung;Choi, Ji-Won;Yoon, Ki-Hyun
    • ETRI Journal
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    • 제25권2호
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    • pp.73-80
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    • 2003
  • This paper describes an effective method for forming silicon oxide on silica-on-silicon platforms, which results in excellent characteristics for hybrid integration. Among the many processes involved in fabricating silica-on-silicon platforms with planar lightwave circuits (PLCs), the process for forming silicon oxide on an etched silicon substrate is very important for obtaining transparent silica film because it determines the compatibility at the interface between the silicon and the silica film. To investigate the effects of the formation process of the silicon oxide on the characteristics of the silica PLC platform, we compared two silicon oxide formation processes: thermal oxidation and plasma-enhanced chemical vapor deposition (PECVD). Thermal oxidation in fabricating silica platforms generates defects and a cristobalite crystal phase, which results in deterioration of the optical waveguide characteristics. On the other hand, a silica platform with the silicon oxide layer deposited by PECVD has a transparent planar optical waveguide because the crystal growth of the silica has been suppressed. We confirm that the PECVD method is an effective process for silicon oxide formation for a silica platform with excellent characteristics.

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Formation Mechanism of the Micro Precipitates Causing Oxidation Induced Stacking Faults in the Czochralski Silicon Crystal.

  • Kim, Young-K.
    • 한국결정성장학회지
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    • 제1권1호
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    • pp.66-73
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    • 1991
  • During the growth of macroscopically dislocation-free Czochralski silicon crystal, micro precipitates causing stacking faults in the silicon wafer during the oxidation are formed Thermal history the cryscausing acquire during the growth process is known to be a key factor determining the nucleation of this micro precipitates. In this article, various mechanisms suggested on the formation of microdefects in the silicon crystal are reviewed to secure the nucleation mechanism of the micro precipitates causing OSF whose pattern is normally ring or annular in CZ silicon crytal. B-defects which are known as vacancy clustering are considered to be the heterogeneous nucleation sites for the micro precipitates causing OSF in the CZ silicon crystals.

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실리콘 에피층 성장과 실리콘 에칭기술을 이용한 Bare Chip Burn-In 테스트용 인터컨넥션 시스템의 제조공정 (Fabrication Processes of Interconnection Systems for Bare Chip Burn-In Tests Using Epitaxial Layer Growth and Etching Techniques of Silicon)

  • 권오경;김준배
    • 한국표면공학회지
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    • 제28권3호
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    • pp.174-181
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    • 1995
  • Multilayered silicon cantilever beams as interconnection systems for bare chip burn-in socket applications have been designed, fabricated and characterized. Fabrication processes of the beam are employing standard semiconductor processes such as thin film processes and epitaxial layer growth and silicon wet etching techniques. We investigated silicon etch rate in 1-3-10 etchant as functions of doping concentration, surface mechanical stress and crystal defects. The experimental results indicate that silicon etch rate in 1-3-10 etchant is strong functions of doping concentration and crystal defect density rather than surface mechanical stress. We suggested the new fabrication processes of multilayered silicon cantilever beams.

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Point defects and grain boundary effects on tensile strength of 3C-SiC studied by molecular dynamics simulations

  • Li, Yingying;Li, Yan;Xiao, Wei
    • Nuclear Engineering and Technology
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    • 제51권3호
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    • pp.769-775
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    • 2019
  • The tensile strength of irradiated 3C-SiC, SiC with artificial point defects, SiC with symmetric tilt grain boundaries (GBs), irradiated SiC with GBs are investigated using molecular dynamics simulations at 300 K. For an irradiated SiC sample, the tensile strength decreases with the increase of irradiation dose. The Young's modulus decreases with the increase of irradiation dose which agrees well with experiment and simulation data. For artificial point defects, the designed point defects dramatically decrease the tensile strength of SiC at low concentration. Among the point defects studied in this work, the vacancies drop the strength the most seriously. SiC symmetric tilt GBs decrease the tensile strength of pure SiC. Under irradiated condition, the tensile strengths of all SiC samples with grain boundaries decrease and converge to certain value because the structures become amorphous and the grain boundaries disappear after high dose irradiation.

다결정 실리콘의 확산 공정 시뮬레이션 (Simulation Methodology for Diffusion Process in Poly-silicon)

  • 이흥주;이준하
    • 반도체디스플레이기술학회지
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    • 제4권1호
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    • pp.23-27
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    • 2005
  • This paper presents a simulation methodology for the poly-silicon oriented TCAD(technology-CAD) system. A computer simulation environment for the poly-silicon processing has been set up with the proper adoption of the two-stream model for ion-doping, diffusion, and defects inside of grain and on the grain boundary. After the simulator calibration, simulation results for the poly-silicon diffusion hat shown a good agreement with the SIMS data.

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디스플레이 소자 개발을 위한 다결정 실리콘 확산의 컴퓨터 모델링에 관한 연구 (Computer Modeling of Impurity Diffusion in Poly-silicon for Display Devices)

  • 이흥주;이준하
    • 한국산학기술학회논문지
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    • 제5권3호
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    • pp.210-217
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    • 2004
  • 본 연구는 기존 반도체 단위공정의 실리콘 중심 CAD 환경을 다결정실리콘 중심의 환경으로 전환하는 방법론에 대해 제안하였다. 다결정실리콘 공정에서의 확산과 이온도핑에 의한 불순물 이동에 관련하여 결정립내부와 결정립계상에서의 확산을 동시에 고려하는 이중흐름(two-stream)모델을 채택하고, 이와 관련된 파라미터들의 민감도 분석을 통하여 다결정실리콘 컴퓨터 시뮬레이션 환경을 재구성하였다. 시뮬레이터의 캘리브레이션 과정을 거친 결과 다결정실리콘에 대한 SIMS 데이터와 전반적으로 잘 일치하였다.

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Defect formation mechanism of 6H-SiC crystals grown by sublimation method

  • Kim, Hwa-Mok;Kyung Joo;Auh, Keun-Ho
    • 한국결정성장학회:학술대회논문집
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    • 한국결정성장학회 1998년도 PROCEEDINGS OF THE 15TH KACG TECHNICAL MEETING-PACIFIC RIM 3 SATELLITE SYMPOSIUM SESSION 4, HOTEL HYUNDAI, KYONGJU, SEPTEMBER 20-23, 1998
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    • pp.35-40
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    • 1998
  • There have two kinds of defects, planar defects and vertical defects which were called micropipes in SiC bulk crystals grown by a sublimation method. We could decrease these defects by adding a little piece of Si in the SiC powder or using Ta cylinder in the crucible. so were report the dependence of these defects in a wafer on silicon/carbon ratio in this paper. The chemical species sublimed from SiC powder is affected by carbon from the graphite wall of the crucible. It is important to control the chemical species on the substrate.

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레이저 산란 메커니즘 매개변수의 실험적 선정 및 태양전지 웨이퍼의 레이저산란패턴 분석에 관한 연구 (Study on Experimental Selection of Parameters in Laser Scattering Mechanism and Analysis of Laser Scattering Patterns in Solar Cell Wafer)

  • 김경범
    • 반도체디스플레이기술학회지
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    • 제10권2호
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    • pp.7-12
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    • 2011
  • In this paper, a laser scattering mechanism are designed to detect micro defects such as dent, scratch, pinhole, etc. Its influential parameters are experimentally selected and scattering patterns of micro defects have been analyzed for silicon wafer in solar cell. As a result of experiments, scattered lights are rather increased in wafer surface with micro defects, in comparison to no micro ones. Scattering parameters are optimally selected for obtaining robust and high quality laser scattering images of micro defects. It is shown that scattered light components are linearly increased according to the increase of micro defect sizes, and the depth of micro-defects give a large influence on optical deflection.

분자동력학 해석을 이용한 인덴테이션시 실리콘 내부의 결함구조에 관한 연구 (A molecular dynamics simulation on the defect structure in silicon under indentation)

  • 트란딘 롱;유용문;강우종;전성식
    • Composites Research
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    • 제24권2호
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    • pp.9-13
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    • 2011
  • 본 논문에서는 zinc blende계열의 결정구조를 갖는 실리콘 내부의 결함을 분석할 수 있는 대칭축 파라메터 (Symmetric axis parameter)방법을 이용하여, 탄성 및 소성 변형을 구별하는 방법을 제시하였다. 분자 동력학 해석프로그램인 LAMMPS를 사용하여, 실리콘에 대한 나노인덴테이션 해석을 수행하였다. 구형 인덴터 아래에 발생한 실리콘내부의 결함은 ring crack에서의 threefold 무늬와 전위발생경로를 보여주였다. 또한, 해석결과는 기존의 이론이나, 실험결과와도 일치하는 것을 확인하였다.