• Title/Summary/Keyword: silicon defects

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Development of microcolumn control unit to detect of via-hole defects on wafer (반도체소자의 Via hole 결함 측정을 위한 전자컬럼 제어기술 개발)

  • Roh, Young-Sup;Kim, Heung-Tae;Kim, H.S.;Kim, D.W.;Ahn, S.J.;Kim, Y.C.;Jin, S.W.;Whang, N.W.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.528-529
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    • 2008
  • A new concept based on sample current measurements for detecting of via-hole defects on wafer has been performed by low energy electron beam microcolumn. The microcolumn has been operated at a low voltage of 290 eV with total emission current of 400 nA, and a sample current of 6 nA. The test sample was fabricated with SiO2 layer of 300 nm thickness on a piece of a silicon substrate. Preliminary results of both sample current method and secondary electron method show microcolumn and its control can be useful technology for detecting of via-hole defects on wafer.

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VOID DEFECTS IN COBALT-DISILICIDE FOR LOGIC DEVICES

  • Song, Ohsung;Ahn, Youngsook
    • Journal of the Korean institute of surface engineering
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    • v.32 no.3
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    • pp.389-392
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    • 1999
  • We employed cobalt-disilicide for high-speed logic devices. We prepared stable and low resistant $CoSi_2$ through typical fabrication process including wet cleaning and rapid thermal process (RTP). We sputtered 15nm thick cobalt on the wafer and performed RTP annealing 2 times to obtain 60nm thick $CoSi_2$. We observed spherical shape voids with diameter of 40nm in the surface and inside $CoSi_2$ layers. The voids resulted in taking over abnormal junction leakage current and contact resistance values. We report that the voids in $CoSi_2$ layers are resulted from surface pits during the ion implantation previous to deposit cobalt layer. Silicide reaction rate around pits was enhanced due to Gibbs-Thompson effects and the volume expansion of the silicidation of the flat active regime trapped dimples. We confirmed that keeping the buffer oxide layer during ion implantation and annealing the silicon surface after ion implantation were required to prevent void defects in CoSi$_2$ layers.

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A Study on the Microstructural, Thermal and Mechanical Properties of Silicon Nitride Ceramic

  • Kim, Jong-Do;Lee, Su-Jin;Lee, Jae-Hoon;Sano, Yuji
    • Journal of Advanced Marine Engineering and Technology
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    • v.33 no.7
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    • pp.1026-1033
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    • 2009
  • Fine ceramics have high strength, excellent wear resistance, chemical stability and high strength at high temperature and are receiving attention in various fields such as construction, engineering, aerospace and marine science. Finish machining process is required to obtain precise ceramics components because sintering process necessary for obtaining high strength and high quality ceramics reduces the dimensions of components and precision of shape. But high strength and brittleness of ceramics materials cause difficulty in processing. So a process for obtaining wanted dimensions is studying using high temperature which makes ceramics softened and thermal affected recently. Laser beam is a very useful optical device for these kinds of processes. Laser process such as laser cutting, laser machining, laser heat treatment and laser-assisted machining(LAM) is researching to manufacture practical ceramics components using intense laser source which can cause local softening and damage of workpiece. In this paper, microstructural and mechanical properties of silicon nitride heated are studied as a basic study for researching of ceramics process by laser beam. The surface variation of HIP and SSN-silicon nitride was analyzed with SEM and EDS. A processing at $1,300^{\circ}C$ or above causes N element to combine into $N_2$ gas and the gas busts from surface. These phenomena make bloat, craters and heat defects on the surface of silicon nitride. Also, oxygen content is largely increased to oxidize the surface and it causes changing of phases and reducing of hardness of surface.

Improvement of Commercial Silicon Solar Cells with N+-P-N+ Structure using Halogenic Oxide Passivation

  • K. Chakrabarty;D. Mangalaraj;Kim, Kyung-Hae;Park, J.H.;J. Yi
    • Transactions on Electrical and Electronic Materials
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    • v.4 no.6
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    • pp.17-20
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    • 2003
  • This paper describes the effect of halogenic gettering during oxide passivation of commercial solar cell with the $N^{+}$-P-$N^{+}$ structure. In order to study the effect of halogenic gettering on $N^{+}$-P-$N^{+}$ structure mono-crystalline silicon solar cell, we performed conventional POCl$_3$ diffusion for emitter formation and oxide passivation in the presence of HCl vapors. The $N^{+}$-P-$N^{+}$ structure based silicon solar cells were found to have higher short circuit current and minority carrier lifetime. Their performance was also found to be superior than the conventional $N^{+}$-P-$N^{+}$ structure based mono-crystalline silicon solar cell. The cell parameters of the $n^{+}$-p-$p^{+}$ and $n^{+}$-p-$n^{+}$ structure based cells, passivated by HCl assisted oxidation were measured. The improvement in $I_{sc}$ was attributed to the effect of the increased diffusion length of minority carriers, which came from the halogenic gettering effect during the growth of passivating oxide. The presence of chlorine caused gettering of the cells by removing the heavy metals, if any. The other advantage of the presence of chlorine was the removal of the diffusion induced (in oxygen environment) stacking faults and line defects from the surfaces of the silicon wafers. All these effects caused the improvement of the minority carrier lifetime, which in-turn helped to improve the quality of the solar cells.

Optical Properties of Silicon Oxide (SiOx, x<2) Thin Films Deposited by PECVD Technique (PECVD 방법으로 증착한 SiOx(x<2) 박막의 광학적 특성 규명)

  • Kim, Youngill;Park, Byoung Youl;Kim, Eunkyeom;Han, Munsup;Sok, Junghyun;Park, Kyoungwan
    • Korean Journal of Metals and Materials
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    • v.49 no.9
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    • pp.732-738
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    • 2011
  • Silicon oxide thin films were deposited by using a plasma-enhanced chemical-vapor deposition technique to investigate the light emission properties. The photoluminescence characteristics were divided into two categories along the relative ratio of the flow rates of $SiH_4$ and $N_2O$ source gases, which show light emission in the broad/visible range and a light emission peak at 380 nm. We attribute the broad/visible light emission and the light emission peak to the quantum confinement effect of nanocrystalline silicon and the Si=O defects, respectively. Changes in the photoluminescence spectra were observed after the post-annealing processes. The photoluminescence spectra of the broad light emission in the visible range shifted to the long wavelength and were saturated above an annealing temperature of $900^{\circ}C$ or after 1 hour annealing at $970^{\circ}C$. However, the position of the light emission peak at 380 nm did not change at all after the post-annealing processes. The light emission intensities at 380 nm initially increased, and decreased at annealing temperatures above $700^{\circ}C$ or after 1 hour annealing at $700^{\circ}C$. The photoluminescence behaviors after the annealing processes can be explained bythe size change of the nanocrystalline silicon and the density change of Si=O defect in the films, respectively. These results support the possibility of using a silicon-based light source for Si-optoelectronic integrated circuits and/or display devices.

A Study on the Application Method of Various Digital Image Processing in the IC Package (IC-패키지에 대한 각종 디지탈 화상처리 기술의 적용방법에 대한 연구)

  • Kim, Jae-Yeol
    • Journal of the Korean Society for Nondestructive Testing
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    • v.12 no.4
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    • pp.18-25
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    • 1993
  • This paper is to aim the microdefect evaluation of If package into a quantitative from NDI's image processing of ultrasonic wave. (1) Automatically repeated discrimination analysis method can be devided in the category of all kind of defects on IC package, and also can be possible to have a sampling of partial delamination. (2) It is possible that the information of edge section in silicon chip surrounding can be extractor by the partial image processing of IC package. Also, the crack detection is possible between the resin part and lead frame.

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A Study on the Reduction of Bird's Beak in the LOCOS Process (LOCOS 공정에서 새부리 크기 감소를 위한 연구)

  • 이찬용;박상민;윤석범;오환술
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.1
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    • pp.91-95
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    • 1990
  • We study the process for the reduction of bird's beak at LOCOS processing with changing the representative coefficients, oxide thickness, silicon nitride thickness, oxidetion temperature and field oxide thickness that induced the condition of bird'beak. In order to eliminate the gate oxide defects induced by selective oxidation, we used additional sacrific oxidatio. Finally we obtained the length of bird's beak to be 5000\ulcornerby SEM.

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Study on the Passivation of Si Surface by Incorporation of Nitrogen in Al2O3 Thin Films Grown by Atomic Layer Deposition (원자층 증착법으로 형성된 Al2O3 박막의 질소 도핑에 따른 실리콘 표면의 부동화 특성 연구)

  • Hong, Hee Kyeung;Heo, Jaeyeong
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.4
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    • pp.111-115
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    • 2015
  • To improve the efficiency of the Si solar cell, high minority carrier life time is required. Therefore, the passivation technology is important to eliminate point defects on the silicon surface, causing the loss of minority carrier recombination. PECVD or post-annealing of thermally-grown $SiO_2$ is commonly used to form the passivation layer, but a high-temperature process and low thermal stability is a critical factor of low minority carrier lifetime. In this study, atomic layer deposition was used to grow the $Al_2O_3$ passivation layer at low temperature process. $Al_2O_3$ was selected as a passivation layer which has a low surface recombination velocity because of the fixed charge density. For the high charge density, an improved minority carrier lifetime, and a low surface recombination, nitrogen was doped in the $Al_2O_3$ thin film and the improvement of passivation was studied.

Variation of the Si-induced Gap State by the N defect at the Si/SiO2 Interface

  • Kim, Gyu-Hyeong;Jeong, Seok-Min
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.128.1-128.1
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    • 2016
  • Nitrided-metal gates on the high-${\kappa}$ dielectric material are widely studied because of their use for sub-20nm semiconductor devices and the academic interest for the evanescent states at the Si/insulator interface. Issues in these systems with the Si substrate are the electron mobility degradation and the reliability problems caused from N defects that permeates between the Si and the $SiO_2$ buffer layer interface from the nitrided-gate during the gate deposition process. Previous studies proposed the N defect structures with the gap states at the Si band gap region. However, recent experimental data shows the possibility of the most stable structure without any N defect state between the bulk Si valence band maximum (VBM) and conduction band minimum (CBM). In this talk, we present a new type of the N defect structure and the electronic structure of the proposed structure by using the first-principles calculation. We find that the pair structure of N atoms at the $Si/SiO_2$ interface has the lowest energy among the structures considered. In the electronic structure, the N pair changes the eigenvalue of the silicon-induced gap state (SIGS) that is spatially localized at the interface and energetically located just above the bulk VBM. With increase of the number of N defects, the SIGS gradually disappears in the bulk Si gap region, as a result, the system gap is increased by the N defect. We find that the SIGS shift with the N defect mainly originates from the change of the kinetic energy part of the eigenstate by the reduction of the SIGS modulation for the incorporated N defect.

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Optically Controlled Silicon MESFET Fabrication and Characterizations for Optical Modulator/Demodulator

  • Chattopadhyay, S.N.;Overton, C.B.;Vetter, S.;Azadeh, M.;Olson, B.H.;Naga, N. El
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.3
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    • pp.213-224
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    • 2010
  • An optically controlled silicon MESFET (OPFET) was fabricated by diffusion process to enhance the quantum efficiency, which is the most important optoelectronic device performance usually affected by ion implantation process due to large number of process induced defects. The desired impurity distribution profile and the junction depth were obtained solely with diffusion, and etching processes monitored by atomic force microscope, spreading resistance profiling and C-V measurements. With this approach fabrication induced defects are reduced, leading to significantly improved performance. The fabricated OPFET devices showed proper I-V characteristics with desired pinch-off voltage and threshold voltage for normally-on devices. The peak photoresponsivity was obtained at 620 nm wavelength and the extracted external quantum efficiency from the photoresponse plot was found to be approximately 87.9%. This result is evidence of enhancement of device quantum efficiency fabricated by the diffusion process. It also supports the fact that the diffusion process is an extremely suitable process for fabrication of high performance optoelectronic devices. The maximum gain of OPFET at optical modulated signal was obtained at the frequency of 1 MHz with rise time and fall time approximately of 480 nS. The extracted transconductance shows the possible potential of device speed performance improvements for shorter gate length. The results support the use of a diffusion process for fabrication of high performance optoelectronic devices.